move PLL reset code from clocks driver to pll driver (#110)
* move PLL reset code from clocks driver to pll driver * Don't clear PLL PWR/FBDIV after reset as unnecessary. Call out in runtime.c why USB/syscfg aren't reset. Co-authored-by: Peter Lawrence <12226419+majbthrd@users.noreply.github.com> Co-authored-by: Luke Wren <wren6991@gmail.com>
This commit is contained in:
@ -7,7 +7,6 @@
|
||||
#include "pico.h"
|
||||
#include "hardware/regs/clocks.h"
|
||||
#include "hardware/platform_defs.h"
|
||||
#include "hardware/resets.h"
|
||||
#include "hardware/clocks.h"
|
||||
#include "hardware/watchdog.h"
|
||||
#include "hardware/pll.h"
|
||||
@ -149,9 +148,6 @@ void clocks_init(void) {
|
||||
// PLL USB: 12 / 1 = 12MHz * 40 = 480 MHz / 5 / 2 = 48MHz
|
||||
/// \end::pll_settings[]
|
||||
|
||||
reset_block(RESETS_RESET_PLL_SYS_BITS | RESETS_RESET_PLL_USB_BITS);
|
||||
unreset_block_wait(RESETS_RESET_PLL_SYS_BITS | RESETS_RESET_PLL_USB_BITS);
|
||||
|
||||
/// \tag::pll_init[]
|
||||
pll_init(pll_sys, 1, 1500 * MHZ, 6, 2);
|
||||
pll_init(pll_usb, 1, 480 * MHZ, 5, 2);
|
||||
|
Reference in New Issue
Block a user