Enable UART RX timeout IRQ, as well as RX IRQ, so that individual characters can be received.
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@ -205,12 +205,17 @@ static inline void uart_set_format(uart_inst_t *uart, uint data_bits, uint stop_
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* this function.
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*
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* \param uart UART instance. \ref uart0 or \ref uart1
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* \param rx_has_data If true an interrupt will be fired when the RX FIFO contain data.
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* \param rx_has_data If true an interrupt will be fired when the RX FIFO contains data.
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* \param tx_needs_data If true an interrupt will be fired when the TX FIFO needs data.
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*/
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static inline void uart_set_irq_enables(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data) {
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// Both UARTRXINTR (RX) and UARTRTINTR (RX timeout) interrupts are
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// required for rx_has_data. RX asserts when >=4 characters are in the RX
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// FIFO (for RXIFLSEL=0). RT asserts when there are >=1 characters and no
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// more have been received for 32 bit periods.
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uart_get_hw(uart)->imsc = (bool_to_bit(tx_needs_data) << UART_UARTIMSC_TXIM_LSB) |
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(bool_to_bit(rx_has_data) << UART_UARTIMSC_RXIM_LSB);
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(bool_to_bit(rx_has_data) << UART_UARTIMSC_RXIM_LSB) |
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(bool_to_bit(rx_has_data) << UART_UARTIMSC_RTIM_LSB);
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if (rx_has_data) {
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// Set minimum threshold
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hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_RXIFLSEL_LSB,
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