Initial Release

src/rp2_common/hardware_flash/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(hardware_flash INTERFACE)
+
+target_sources(hardware_flash INTERFACE
+        ${CMAKE_CURRENT_LIST_DIR}/flash.c
+        )
+
+target_include_directories(hardware_flash INTERFACE ${CMAKE_CURRENT_LIST_DIR}/include)
+target_link_libraries(hardware_flash INTERFACE pico_base_headers pico_bootrom)

src/rp2_common/hardware_flash/flash.c

@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "hardware/flash.h"
+#include "pico/bootrom.h"
+
+#define FLASH_BLOCK_ERASE_CMD 0xd8
+
+#define __compiler_barrier() asm volatile("" ::: "memory")
+
+//-----------------------------------------------------------------------------
+// Infrastructure for reentering XIP mode after exiting for programming (take
+// a copy of boot2 before XIP exit). Calling boot2 as a function works because
+// it accepts a return vector in LR (and doesn't trash r4-r7). Bootrom passes
+// NULL in LR, instructing boot2 to enter flash vector table's reset handler.
+
+#if !PICO_NO_FLASH
+
+#define BOOT2_SIZE_WORDS 64
+
+static uint32_t boot2_copyout[BOOT2_SIZE_WORDS];
+static bool boot2_copyout_valid = false;
+
+static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)() {
+    if (boot2_copyout_valid)
+        return;
+    for (int i = 0; i < BOOT2_SIZE_WORDS; ++i)
+        boot2_copyout[i] = ((uint32_t *)XIP_BASE)[i];
+    __compiler_barrier();
+    boot2_copyout_valid = true;
+}
+
+static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)() {
+    ((void (*)(void))boot2_copyout+1)();
+}
+
+#else
+
+static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)() {}
+
+static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)() {
+    // Set up XIP for 03h read on bus access (slow but generic)
+    void (*flash_enter_cmd_xip)(void) = (void(*)(void))rom_func_lookup(rom_table_code('C', 'X'));
+    assert(flash_enter_cmd_xip);
+    flash_enter_cmd_xip();
+}
+
+#endif
+
+//-----------------------------------------------------------------------------
+// Actual flash programming shims (work whether or not PICO_NO_FLASH==1)
+
+void __no_inline_not_in_flash_func(flash_range_erase)(uint32_t flash_offs, size_t count) {
+#ifdef PICO_FLASH_SIZE_BYTES
+    hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
+#endif
+    invalid_params_if(FLASH, flash_offs & (FLASH_SECTOR_SIZE - 1));
+    invalid_params_if(FLASH, count & (FLASH_SECTOR_SIZE - 1));
+    void (*connect_internal_flash)(void) = (void(*)(void))rom_func_lookup(rom_table_code('I', 'F'));
+    void (*flash_exit_xip)(void) = (void(*)(void))rom_func_lookup(rom_table_code('E', 'X'));
+    void (*flash_range_erase)(uint32_t, size_t, uint32_t, uint8_t) =
+        (void(*)(uint32_t, size_t, uint32_t, uint8_t))rom_func_lookup(rom_table_code('R', 'E'));
+    void (*flash_flush_cache)(void) = (void(*)(void))rom_func_lookup(rom_table_code('F', 'C'));
+    assert(connect_internal_flash && flash_exit_xip && flash_range_erase && flash_flush_cache);
+    flash_init_boot2_copyout();
+
+    // No flash accesses after this point
+    __compiler_barrier();
+
+    connect_internal_flash();
+    flash_exit_xip();
+    flash_range_erase(flash_offs, count, FLASH_BLOCK_SIZE, FLASH_BLOCK_ERASE_CMD);
+    flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing
+    flash_enable_xip_via_boot2();
+}
+
+void __no_inline_not_in_flash_func(flash_range_program)(uint32_t flash_offs, const uint8_t *data, size_t count) {
+#ifdef PICO_FLASH_SIZE_BYTES
+    hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
+#endif
+    invalid_params_if(FLASH, flash_offs & (FLASH_PAGE_SIZE - 1));
+    invalid_params_if(FLASH, count & (FLASH_PAGE_SIZE - 1));
+    void (*connect_internal_flash)(void) = (void(*)(void))rom_func_lookup(rom_table_code('I', 'F'));
+    void (*flash_exit_xip)(void) = (void(*)(void))rom_func_lookup(rom_table_code('E', 'X'));
+    void (*flash_range_program)(uint32_t, const uint8_t*, size_t) =
+        (void(*)(uint32_t, const uint8_t*, size_t))rom_func_lookup(rom_table_code('R', 'P'));
+    void (*flash_flush_cache)(void) = (void(*)(void))rom_func_lookup(rom_table_code('F', 'C'));
+    assert(connect_internal_flash && flash_exit_xip && flash_range_program && flash_flush_cache);
+    flash_init_boot2_copyout();
+
+    __compiler_barrier();
+
+    connect_internal_flash();
+    flash_exit_xip();
+    flash_range_program(flash_offs, data, count);
+    flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing
+    flash_enable_xip_via_boot2();
+}

src/rp2_common/hardware_flash/include/hardware/flash.h

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _HARDWARE_FLASH_H
+#define _HARDWARE_FLASH_H
+
+#include "pico.h"
+
+// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_FLASH, Enable/disable assertions in the flash module, type=bool, default=0, group=hardware_flash
+#ifndef PARAM_ASSERTIONS_ENABLED_FLASH
+#define PARAM_ASSERTIONS_ENABLED_FLASH 0
+#endif
+
+#define FLASH_PAGE_SIZE (1u << 8)
+#define FLASH_SECTOR_SIZE (1u << 12)
+#define FLASH_BLOCK_SIZE (1u << 16)
+
+/** \file flash.h
+ *  \defgroup hardware_flash hardware_flash
+ *
+ * Low level flash programming and erase API
+ *
+ * Note these functions are *unsafe* if you have two cores concurrently
+ * executing from flash. In this case you must perform your own
+ * synchronisation to make sure no XIP accesses take place during flash
+ * programming.
+ *
+ * If PICO_NO_FLASH=1 is not defined (i.e. if the program is built to run from
+ * flash) then these functions will make a static copy of the second stage
+ * bootloader in SRAM, and use this to reenter execute-in-place mode after
+ * programming or erasing flash, so that they can safely be called from
+ * flash-resident code.
+ *
+ * \subsection flash_example Example
+ * \include flash_program.c
+ */
+
+
+/*! \brief  Erase areas of flash
+ *  \ingroup hardware_flash
+ *
+ * \param flash_offs Offset into flash, in bytes, to start the erase. Must be aligned to a 4096-byte flash sector.
+ * \param count Number of bytes to be erased. Must be a multiple of 4096 bytes (one sector).
+ */
+void flash_range_erase(uint32_t flash_offs, size_t count);
+
+/*! \brief  Program flash
+ *  \ingroup hardware_flash
+ *
+ * \param flash_offs Flash address of the first byte to be programmed. Must be aligned to a 256-byte flash page.
+ * \param data Pointer to the data to program into flash
+ * \param count Number of bytes to program. Must be a multiple of 256 bytes (one page).
+ */
+void flash_range_program(uint32_t flash_offs, const uint8_t *data, size_t count);
+
+#endif