review fixes
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@ -18,7 +18,7 @@ extern "C" {
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/** \file hardware/sync.h
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/** \file hardware/sync.h
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* \defgroup hardware_sync hardware_sync
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* \defgroup hardware_sync hardware_sync
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*
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*
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* Low level hardware spim locks, barrier and processor event APIs
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* Low level hardware spin locks, barrier and processor event APIs
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*
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*
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* Spin Locks
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* Spin Locks
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* ----------
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* ----------
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@ -39,10 +39,10 @@ extern "C" {
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*
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*
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* Number (ID) | Description
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* Number (ID) | Description
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* :---------: | -----------
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* :---------: | -----------
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* 0-13 | Currently reserved for exclusive use by the SDK and other libraries. If you use these spin locks, you risk breaking SDK or other library functionality. Each reserved spin lock use individually has its own PICO_SPINLOCK_ID so you can search for those).
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* 0-13 | Currently reserved for exclusive use by the SDK and other libraries. If you use these spin locks, you risk breaking SDK or other library functionality. Each reserved spin lock used individually has its own PICO_SPINLOCK_ID so you can search for those.
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* 14,15 | (\ref PICO_SPINLOCK_ID_OS1 and \ref PICO_SPINLOCK_ID_OS2). Currently reserved for exclusive use by an operating system (or other system level software) co-existing with the SDK.
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* 14,15 | (\ref PICO_SPINLOCK_ID_OS1 and \ref PICO_SPINLOCK_ID_OS2). Currently reserved for exclusive use by an operating system (or other system level software) co-existing with the SDK.
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* 16-23 | (\ref PICO_SPINLOCK_ID_STRIPED_FIRST - \ref PICO_SPINLOCK_ID_STRIPED_LAST). Spin locks from this range are assigned in a round-robin fashion via next_striped_spin_lock_num(). These spin locks are share, but assigning numbers from a range reduces the probability that two higher level locking primitives using _striped_ spin locks will actually be using the same spin lock.
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* 16-23 | (\ref PICO_SPINLOCK_ID_STRIPED_FIRST - \ref PICO_SPINLOCK_ID_STRIPED_LAST). Spin locks from this range are assigned in a round-robin fashion via \ref next_striped_spin_lock_num(). These spin locks are shared, but assigning numbers from a range reduces the probability that two higher level locking primitives using _striped_ spin locks will actually be using the same spin lock.
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* 24-31 | (\ref PICO_SPINLOCK_ID_CLAIM_FREE_FIRST - \ref PICO_SPINLOCK_ID_CLAIM_FREE_LAST). These are reserved for exclusive used and are allocated on a first come first serve basis at runtime via \ref spin_lock_claim_unused()
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* 24-31 | (\ref PICO_SPINLOCK_ID_CLAIM_FREE_FIRST - \ref PICO_SPINLOCK_ID_CLAIM_FREE_LAST). These are reserved for exclusive use and are allocated on a first come first served basis at runtime via \ref spin_lock_claim_unused()
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*/
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*/
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// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_SYNC, Enable/disable assertions in the HW sync module, type=bool, default=0, group=hardware_sync
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// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_SYNC, Enable/disable assertions in the HW sync module, type=bool, default=0, group=hardware_sync
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@ -70,12 +70,12 @@ typedef volatile uint32_t spin_lock_t;
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#define PICO_SPINLOCK_ID_HARDWARE_CLAIM 11
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#define PICO_SPINLOCK_ID_HARDWARE_CLAIM 11
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#endif
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_OS1, Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=12, group=hardware_sync
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// PICO_CONFIG: PICO_SPINLOCK_ID_OS1, Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=14, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_OS1
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#ifndef PICO_SPINLOCK_ID_OS1
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#define PICO_SPINLOCK_ID_OS1 14
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#define PICO_SPINLOCK_ID_OS1 14
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#endif
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_OS2, Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=13, group=hardware_sync
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// PICO_CONFIG: PICO_SPINLOCK_ID_OS2, Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=15, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_OS2
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#ifndef PICO_SPINLOCK_ID_OS2
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#define PICO_SPINLOCK_ID_OS2 15
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#define PICO_SPINLOCK_ID_OS2 15
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#endif
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#endif
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@ -95,11 +95,14 @@ typedef volatile uint32_t spin_lock_t;
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#define PICO_SPINLOCK_ID_CLAIM_FREE_FIRST 24
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#define PICO_SPINLOCK_ID_CLAIM_FREE_FIRST 24
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#endif
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_CLAIM_FREE_END, Highest Spinlock ID in the 'claim free' range, min=0, max=31, default=31, group=hardware_sync
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#ifdef PICO_SPINLOCK_ID_CLAIM_FREE_END
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#ifndef PICO_SPINLOCK_ID_CLAIM_FREE_END
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#warning PICO_SPINLOCK_ID_CLAIM_FREE_END has been renamed to PICO_SPINLOCK_ID_CLAIM_FREE_LAST
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#define PICO_SPINLOCK_ID_CLAIM_FREE_END 31
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#endif
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_CLAIM_FREE_END, Highest Spinlock ID in the 'claim free' range, min=0, max=31, default=31, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_CLAIM_FREE_LAST
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#define PICO_SPINLOCK_ID_CLAIM_FREE_LAST 31
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#endif
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/*! \brief Insert a SEV instruction in to the code path.
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/*! \brief Insert a SEV instruction in to the code path.
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* \ingroup hardware_sync
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* \ingroup hardware_sync
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@ -54,6 +54,6 @@ void spin_lock_unclaim(uint lock_num) {
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}
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}
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int spin_lock_claim_unused(bool required) {
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int spin_lock_claim_unused(bool required) {
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return hw_claim_unused_from_range((uint8_t*)&claimed, required, PICO_SPINLOCK_ID_CLAIM_FREE_FIRST, PICO_SPINLOCK_ID_CLAIM_FREE_END, "No spinlocks are available");
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return hw_claim_unused_from_range((uint8_t*)&claimed, required, PICO_SPINLOCK_ID_CLAIM_FREE_FIRST, PICO_SPINLOCK_ID_CLAIM_FREE_LAST, "No spinlocks are available");
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}
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}
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