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N_GPIOS duplicates NUM_BANK0_GPIOS (#7)

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This commit is contained in:
Graham Sanderson 2021-01-28 07:48:11 -06:00 committed by Graham Sanderson
parent 92bd96a3b2
commit 419890cfd8
5 changed files with 13 additions and 15 deletions
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2
lib/tinyusb

@ -1 +1 @@
Subproject commit e0aa405d19e35dbf58cf502b8106455c1a3c2a5c Subproject commit edb1d19454a85d92bc4172d8e4557ca1e85f85eb

2
src/host/hardware_gpio/include/hardware/gpio.h
View File

@ -31,7 +31,7 @@ enum gpio_function {
#define GPIO_OUT 1 #define GPIO_OUT 1
#define GPIO_IN 0 #define GPIO_IN 0
#define N_GPIOS 30 #define NUM_BANK0_GPIOS 30
// ---------------------------------------------------------------------------- // ----------------------------------------------------------------------------
// Pad Controls + IO Muxing // Pad Controls + IO Muxing

16
src/rp2_common/hardware_gpio/gpio.c
View File

@ -16,7 +16,7 @@ static gpio_irq_callback_t _callbacks[NUM_CORES];
// Get the raw value from the pin, bypassing any muxing or overrides. // Get the raw value from the pin, bypassing any muxing or overrides.
int gpio_get_pad(uint gpio) { int gpio_get_pad(uint gpio) {
invalid_params_if(GPIO, gpio >= N_GPIOS); invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
hw_set_bits(&padsbank0_hw->io[gpio], PADS_BANK0_GPIO0_IE_BITS); hw_set_bits(&padsbank0_hw->io[gpio], PADS_BANK0_GPIO0_IE_BITS);
return (iobank0_hw->io[gpio].status & IO_BANK0_GPIO0_STATUS_INFROMPAD_BITS) return (iobank0_hw->io[gpio].status & IO_BANK0_GPIO0_STATUS_INFROMPAD_BITS)
>> IO_BANK0_GPIO0_STATUS_INFROMPAD_LSB; >> IO_BANK0_GPIO0_STATUS_INFROMPAD_LSB;
@ -26,7 +26,7 @@ int gpio_get_pad(uint gpio) {
// Select function for this GPIO, and ensure input/output are enabled at the pad. // Select function for this GPIO, and ensure input/output are enabled at the pad.
// This also clears the input/output/irq override bits. // This also clears the input/output/irq override bits.
void gpio_set_function(uint gpio, enum gpio_function fn) { void gpio_set_function(uint gpio, enum gpio_function fn) {
invalid_params_if(GPIO, gpio >= N_GPIOS); invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
invalid_params_if(GPIO, fn << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB & ~IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS); invalid_params_if(GPIO, fn << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB & ~IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS);
// Set input enable on, output disable off // Set input enable on, output disable off
hw_write_masked(&padsbank0_hw->io[gpio], hw_write_masked(&padsbank0_hw->io[gpio],
@ -40,14 +40,14 @@ void gpio_set_function(uint gpio, enum gpio_function fn) {
/// \end::gpio_set_function[] /// \end::gpio_set_function[]
enum gpio_function gpio_get_function(uint gpio) { enum gpio_function gpio_get_function(uint gpio) {
invalid_params_if(GPIO, gpio >= N_GPIOS); invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
return (enum gpio_function) ((iobank0_hw->io[gpio].ctrl & IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS) >> IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB); return (enum gpio_function) ((iobank0_hw->io[gpio].ctrl & IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS) >> IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB);
} }
// Note that, on RP2040, setting both pulls enables a "bus keep" function, // Note that, on RP2040, setting both pulls enables a "bus keep" function,
// i.e. weak pull to whatever is current high/low state of GPIO. // i.e. weak pull to whatever is current high/low state of GPIO.
void gpio_set_pulls(uint gpio, bool up, bool down) { void gpio_set_pulls(uint gpio, bool up, bool down) {
invalid_params_if(GPIO, gpio >= N_GPIOS); invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
hw_write_masked( hw_write_masked(
&padsbank0_hw->io[gpio], &padsbank0_hw->io[gpio],
(!!up << PADS_BANK0_GPIO0_PUE_LSB) | (!!down << PADS_BANK0_GPIO0_PDE_LSB), (!!up << PADS_BANK0_GPIO0_PUE_LSB) | (!!down << PADS_BANK0_GPIO0_PDE_LSB),
@ -57,7 +57,7 @@ void gpio_set_pulls(uint gpio, bool up, bool down) {
// Direct overrides for pad controls // Direct overrides for pad controls
void gpio_set_inover(uint gpio, uint value) { void gpio_set_inover(uint gpio, uint value) {
invalid_params_if(GPIO, gpio >= N_GPIOS); invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
hw_write_masked(&iobank0_hw->io[gpio].ctrl, hw_write_masked(&iobank0_hw->io[gpio].ctrl,
value << IO_BANK0_GPIO0_CTRL_INOVER_LSB, value << IO_BANK0_GPIO0_CTRL_INOVER_LSB,
IO_BANK0_GPIO0_CTRL_INOVER_BITS IO_BANK0_GPIO0_CTRL_INOVER_BITS
@ -65,7 +65,7 @@ void gpio_set_inover(uint gpio, uint value) {
} }
void gpio_set_outover(uint gpio, uint value) { void gpio_set_outover(uint gpio, uint value) {
invalid_params_if(GPIO, gpio >= N_GPIOS); invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
hw_write_masked(&iobank0_hw->io[gpio].ctrl, hw_write_masked(&iobank0_hw->io[gpio].ctrl,
value << IO_BANK0_GPIO0_CTRL_OUTOVER_LSB, value << IO_BANK0_GPIO0_CTRL_OUTOVER_LSB,
IO_BANK0_GPIO0_CTRL_OUTOVER_BITS IO_BANK0_GPIO0_CTRL_OUTOVER_BITS
@ -73,7 +73,7 @@ void gpio_set_outover(uint gpio, uint value) {
} }
void gpio_set_oeover(uint gpio, uint value) { void gpio_set_oeover(uint gpio, uint value) {
invalid_params_if(GPIO, gpio >= N_GPIOS); invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
hw_write_masked(&iobank0_hw->io[gpio].ctrl, hw_write_masked(&iobank0_hw->io[gpio].ctrl,
value << IO_BANK0_GPIO0_CTRL_OEOVER_LSB, value << IO_BANK0_GPIO0_CTRL_OEOVER_LSB,
IO_BANK0_GPIO0_CTRL_OEOVER_BITS IO_BANK0_GPIO0_CTRL_OEOVER_BITS
@ -83,7 +83,7 @@ void gpio_set_oeover(uint gpio, uint value) {
static void gpio_irq_handler(void) { static void gpio_irq_handler(void) {
io_irq_ctrl_hw_t *irq_ctrl_base = get_core_num() ? io_irq_ctrl_hw_t *irq_ctrl_base = get_core_num() ?
&iobank0_hw->proc1_irq_ctrl : &iobank0_hw->proc0_irq_ctrl; &iobank0_hw->proc1_irq_ctrl : &iobank0_hw->proc0_irq_ctrl;
for (uint gpio = 0; gpio < N_GPIOS; gpio++) { for (uint gpio = 0; gpio < NUM_BANK0_GPIOS; gpio++) {
io_rw_32 *status_reg = &irq_ctrl_base->ints[gpio / 8]; io_rw_32 *status_reg = &irq_ctrl_base->ints[gpio / 8];
uint events = (*status_reg >> 4 * (gpio % 8)) & 0xf; uint events = (*status_reg >> 4 * (gpio % 8)) & 0xf;
if (events) { if (events) {

2
src/rp2_common/hardware_gpio/include/hardware/gpio.h
View File

@ -133,8 +133,6 @@ enum gpio_override {
GPIO_OVERRIDE_HIGH = 3, ///< drive high/enable output GPIO_OVERRIDE_HIGH = 3, ///< drive high/enable output
}; };
#define N_GPIOS 30
// ---------------------------------------------------------------------------- // ----------------------------------------------------------------------------
// Pad Controls + IO Muxing // Pad Controls + IO Muxing
// ---------------------------------------------------------------------------- // ----------------------------------------------------------------------------

6
src/rp2_common/hardware_pwm/include/hardware/pwm.h
View File

@ -71,7 +71,7 @@ typedef struct {
* \return The PWM slice number that controls the specified GPIO. * \return The PWM slice number that controls the specified GPIO.
*/ */
static inline uint pwm_gpio_to_slice_num(uint gpio) { static inline uint pwm_gpio_to_slice_num(uint gpio) {
valid_params_if(PWM, gpio < N_GPIOS); valid_params_if(PWM, gpio < NUM_BANK0_GPIOS);
return (gpio >> 1u) & 7u; return (gpio >> 1u) & 7u;
} }
@ -83,7 +83,7 @@ static inline uint pwm_gpio_to_slice_num(uint gpio) {
* \return The PWM channel that controls the specified GPIO. * \return The PWM channel that controls the specified GPIO.
*/ */
static inline uint pwm_gpio_to_channel(uint gpio) { static inline uint pwm_gpio_to_channel(uint gpio) {
valid_params_if(PWM, gpio < N_GPIOS); valid_params_if(PWM, gpio < NUM_BANK0_GPIOS);
return gpio & 1u; return gpio & 1u;
} }
@ -267,7 +267,7 @@ static inline void pwm_set_both_levels(uint slice_num, uint16_t level_a, uint16_
* \param level PWM level for this GPIO * \param level PWM level for this GPIO
*/ */
static inline void pwm_set_gpio_level(uint gpio, uint16_t level) { static inline void pwm_set_gpio_level(uint gpio, uint16_t level) {
valid_params_if(PWM, gpio < N_GPIOS); valid_params_if(PWM, gpio < NUM_BANK0_GPIOS);
pwm_set_chan_level(pwm_gpio_to_slice_num(gpio), pwm_gpio_to_channel(gpio), level); pwm_set_chan_level(pwm_gpio_to_slice_num(gpio), pwm_gpio_to_channel(gpio), level);
} }