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Avoid compound assignment with volatile left operand as described in #1017 (#1018)

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also move to use of hw_set_bits where appropriate
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Jonathan Reichelt Gjertsen 2022-10-17 00:24:23 +02:00 committed by GitHub
parent e22807bc2e
commit 587ac803c5
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 8 additions and 7 deletions
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2
src/rp2_common/hardware_interp/include/hardware/interp.h
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@ -296,7 +296,7 @@ static inline void interp_set_config(interp_hw_t *interp, uint lane, interp_conf
*/ */
static inline void interp_set_force_bits(interp_hw_t *interp, uint lane, uint bits) { static inline void interp_set_force_bits(interp_hw_t *interp, uint lane, uint bits) {
// note cannot use hw_set_bits on SIO // note cannot use hw_set_bits on SIO
interp->ctrl[lane] |= (bits << SIO_INTERP0_CTRL_LANE0_FORCE_MSB_LSB); interp->ctrl[lane] = interp->ctrl[lane] | (bits << SIO_INTERP0_CTRL_LANE0_FORCE_MSB_LSB);
} }
typedef struct { typedef struct {

13
src/rp2_common/hardware_pio/include/hardware/pio.h
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@ -580,7 +580,7 @@ static inline void pio_set_sm_mask_enabled(PIO pio, uint32_t mask, bool enabled)
static inline void pio_sm_restart(PIO pio, uint sm) { static inline void pio_sm_restart(PIO pio, uint sm) {
check_pio_param(pio); check_pio_param(pio);
check_sm_param(sm); check_sm_param(sm);
pio->ctrl |= 1u << (PIO_CTRL_SM_RESTART_LSB + sm); hw_set_bits(&pio->ctrl, 1u << (PIO_CTRL_SM_RESTART_LSB + sm));
} }
/*! \brief Restart multiple state machine with a known state /*! \brief Restart multiple state machine with a known state
@ -595,7 +595,7 @@ static inline void pio_sm_restart(PIO pio, uint sm) {
static inline void pio_restart_sm_mask(PIO pio, uint32_t mask) { static inline void pio_restart_sm_mask(PIO pio, uint32_t mask) {
check_pio_param(pio); check_pio_param(pio);
check_sm_mask(mask); check_sm_mask(mask);
pio->ctrl |= (mask << PIO_CTRL_SM_RESTART_LSB) & PIO_CTRL_SM_RESTART_BITS; hw_set_bits(&pio->ctrl, (mask << PIO_CTRL_SM_RESTART_LSB) & PIO_CTRL_SM_RESTART_BITS);
} }
/*! \brief Restart a state machine's clock divider from a phase of 0 /*! \brief Restart a state machine's clock divider from a phase of 0
@ -622,7 +622,7 @@ static inline void pio_restart_sm_mask(PIO pio, uint32_t mask) {
static inline void pio_sm_clkdiv_restart(PIO pio, uint sm) { static inline void pio_sm_clkdiv_restart(PIO pio, uint sm) {
check_pio_param(pio); check_pio_param(pio);
check_sm_param(sm); check_sm_param(sm);
pio->ctrl |= 1u << (PIO_CTRL_CLKDIV_RESTART_LSB + sm); hw_set_bits(&pio->ctrl, 1u << (PIO_CTRL_CLKDIV_RESTART_LSB + sm));
} }
/*! \brief Restart multiple state machines' clock dividers from a phase of 0. /*! \brief Restart multiple state machines' clock dividers from a phase of 0.
@ -657,7 +657,7 @@ static inline void pio_sm_clkdiv_restart(PIO pio, uint sm) {
static inline void pio_clkdiv_restart_sm_mask(PIO pio, uint32_t mask) { static inline void pio_clkdiv_restart_sm_mask(PIO pio, uint32_t mask) {
check_pio_param(pio); check_pio_param(pio);
check_sm_mask(mask); check_sm_mask(mask);
pio->ctrl |= (mask << PIO_CTRL_CLKDIV_RESTART_LSB) & PIO_CTRL_CLKDIV_RESTART_BITS; hw_set_bits(&pio->ctrl, (mask << PIO_CTRL_CLKDIV_RESTART_LSB) & PIO_CTRL_CLKDIV_RESTART_BITS);
} }
/*! \brief Enable multiple PIO state machines synchronizing their clock dividers /*! \brief Enable multiple PIO state machines synchronizing their clock dividers
@ -674,8 +674,9 @@ static inline void pio_clkdiv_restart_sm_mask(PIO pio, uint32_t mask) {
static inline void pio_enable_sm_mask_in_sync(PIO pio, uint32_t mask) { static inline void pio_enable_sm_mask_in_sync(PIO pio, uint32_t mask) {
check_pio_param(pio); check_pio_param(pio);
check_sm_mask(mask); check_sm_mask(mask);
pio->ctrl |= ((mask << PIO_CTRL_CLKDIV_RESTART_LSB) & PIO_CTRL_CLKDIV_RESTART_BITS) | hw_set_bits(&pio->ctrl,
((mask << PIO_CTRL_SM_ENABLE_LSB) & PIO_CTRL_SM_ENABLE_BITS); ((mask << PIO_CTRL_CLKDIV_RESTART_LSB) & PIO_CTRL_CLKDIV_RESTART_BITS) |
((mask << PIO_CTRL_SM_ENABLE_LSB) & PIO_CTRL_SM_ENABLE_BITS));
} }
/*! \brief PIO interrupt source numbers for pio related IRQs /*! \brief PIO interrupt source numbers for pio related IRQs