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IRQ on CYW43_PIN_WL_HOST_WAKE not gpio13 (#1069)

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fix bug #1068 where the raw irq handler that was added masked on IO_IRQ_BANK0 (defined as 13) and not the gpio connected to the CYW43 i.e.  CYW43_PIN_WL_HOST_WAKE

Co-authored-by: andrew arm <armdev@openlx.org.uk>
This commit is contained in:
envirocoder 2022-11-24 14:42:25 +00:00 committed by GitHub
parent 6cc9394c5c
commit 887c0b8443
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 6 additions and 6 deletions
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4
src/rp2_common/pico_cyw43_arch/cyw43_arch_freertos.c
View File

@ -138,7 +138,7 @@ int cyw43_arch_init(void) {
return PICO_ERROR_GENERIC; return PICO_ERROR_GENERIC;
} }
gpio_add_raw_irq_handler_with_order_priority(IO_IRQ_BANK0, gpio_irq_handler, CYW43_GPIO_IRQ_HANDLER_PRIORITY); gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler, CYW43_GPIO_IRQ_HANDLER_PRIORITY);
gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true); gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true);
irq_set_enabled(IO_IRQ_BANK0, true); irq_set_enabled(IO_IRQ_BANK0, true);
@ -167,7 +167,7 @@ void cyw43_arch_deinit(void) {
signal_cyw43_task(); signal_cyw43_task();
} }
gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, false); gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, false);
gpio_remove_raw_irq_handler(IO_IRQ_BANK0, gpio_irq_handler); gpio_remove_raw_irq_handler(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler);
cyw43_deinit(&cyw43_state); cyw43_deinit(&cyw43_state);
} }

4
src/rp2_common/pico_cyw43_arch/cyw43_arch_poll.c
View File

@ -59,7 +59,7 @@ int cyw43_arch_init(void) {
lwip_init(); lwip_init();
done_lwip_init = true; done_lwip_init = true;
} }
gpio_add_raw_irq_handler_with_order_priority(IO_IRQ_BANK0, gpio_irq_handler, CYW43_GPIO_IRQ_HANDLER_PRIORITY); gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler, CYW43_GPIO_IRQ_HANDLER_PRIORITY);
gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true); gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true);
irq_set_enabled(IO_IRQ_BANK0, true); irq_set_enabled(IO_IRQ_BANK0, true);
return 0; return 0;
@ -67,7 +67,7 @@ int cyw43_arch_init(void) {
void cyw43_arch_deinit(void) { void cyw43_arch_deinit(void) {
gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, false); gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, false);
gpio_remove_raw_irq_handler(IO_IRQ_BANK0, gpio_irq_handler); gpio_remove_raw_irq_handler(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler);
cyw43_deinit(&cyw43_state); cyw43_deinit(&cyw43_state);
} }

4
src/rp2_common/pico_cyw43_arch/cyw43_arch_threadsafe_background.c
View File

@ -187,7 +187,7 @@ int cyw43_arch_init(void) {
return PICO_ERROR_GENERIC; return PICO_ERROR_GENERIC;
} }
gpio_add_raw_irq_handler_with_order_priority(IO_IRQ_BANK0, gpio_irq_handler, CYW43_GPIO_IRQ_HANDLER_PRIORITY); gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler, CYW43_GPIO_IRQ_HANDLER_PRIORITY);
gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true); gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, true);
irq_set_enabled(IO_IRQ_BANK0, true); irq_set_enabled(IO_IRQ_BANK0, true);
@ -209,7 +209,7 @@ void cyw43_arch_deinit(void) {
periodic_alarm = -1; periodic_alarm = -1;
} }
gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, false); gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, GPIO_IRQ_LEVEL_HIGH, false);
gpio_remove_raw_irq_handler(IO_IRQ_BANK0, gpio_irq_handler); gpio_remove_raw_irq_handler(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler);
low_prio_irq_deinit(); low_prio_irq_deinit();
cyw43_deinit(&cyw43_state); cyw43_deinit(&cyw43_state);
} }