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Make kitchen_sink check param assertions, and include all headers - fix sign-compare warnings (#316)

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This commit is contained in:
Graham Sanderson
2021-04-06 20:50:26 -05:00
committed by GitHub
parent 0911393fe2
commit 92f948c123
6 changed files with 53 additions and 19 deletions
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5
src/rp2_common/hardware_dma/dma.c
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@ -60,9 +60,10 @@ void print_dma_ctrl(dma_channel_hw_t *channel) {
ctrl & DMA_CH0_CTRL_TRIG_HIGH_PRIORITY_BITS ? 1 : 0,
ctrl & DMA_CH0_CTRL_TRIG_EN_BITS ? 1 : 0);
}
#endif
void check_dma_channel_param_impl(uint channel) {
#if PARAM_ASSERTIONS_ENABLED(DMA)
void check_dma_channel_param_impl(uint __unused channel) {
valid_params_if(DMA, channel < NUM_DMA_CHANNELS);
}
#endif

2
src/rp2_common/hardware_gpio/gpio.c
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@ -27,7 +27,7 @@ int gpio_get_pad(uint gpio) {
// This also clears the input/output/irq override bits.
void gpio_set_function(uint gpio, enum gpio_function fn) {
invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
invalid_params_if(GPIO, fn << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB & ~IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS);
invalid_params_if(GPIO, ((uint32_t)fn << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB) & ~IO_BANK0_GPIO0_CTRL_FUNCSEL_BITS);
// Set input enable on, output disable off
hw_write_masked(&padsbank0_hw->io[gpio],
PADS_BANK0_GPIO0_IE_BITS,

4
src/rp2_common/hardware_pio/include/hardware/pio.h
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@ -320,7 +320,7 @@ static inline void sm_config_set_out_shift(pio_sm_config *c, bool shift_right, b
* \param join Specifies the join type. \see enum pio_fifo_join
*/
static inline void sm_config_set_fifo_join(pio_sm_config *c, enum pio_fifo_join join) {
valid_params_if(PIO, join >= PIO_FIFO_JOIN_NONE && join <= PIO_FIFO_JOIN_RX);
valid_params_if(PIO, join == PIO_FIFO_JOIN_NONE || join == PIO_FIFO_JOIN_TX || join == PIO_FIFO_JOIN_RX);
c->shiftctrl = (c->shiftctrl & (uint)~(PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS | PIO_SM0_SHIFTCTRL_FJOIN_RX_BITS)) |
(((uint)join) << PIO_SM0_SHIFTCTRL_FJOIN_TX_LSB);
}
@ -350,7 +350,7 @@ static inline void sm_config_set_out_special(pio_sm_config *c, bool sticky, bool
* \param status_n parameter for the mov status operation (currently a bit count)
*/
static inline void sm_config_set_mov_status(pio_sm_config *c, enum pio_mov_status_type status_sel, uint status_n) {
valid_params_if(PIO, status_sel >= STATUS_TX_LESSTHAN && status_sel <= STATUS_RX_LESSTHAN);
valid_params_if(PIO, status_sel == STATUS_TX_LESSTHAN || status_sel == STATUS_RX_LESSTHAN);
c->execctrl = (c->execctrl
& ~(PIO_SM0_EXECCTRL_STATUS_SEL_BITS | PIO_SM0_EXECCTRL_STATUS_N_BITS))
| ((((uint)status_sel) << PIO_SM0_EXECCTRL_STATUS_SEL_LSB) & PIO_SM0_EXECCTRL_STATUS_SEL_BITS)

18
src/rp2_common/hardware_pwm/include/hardware/pwm.h
View File

@ -47,10 +47,10 @@ extern "C" {
*/
enum pwm_clkdiv_mode
{
PWM_DIV_FREE_RUNNING, ///< Free-running counting at rate dictated by fractional divider
PWM_DIV_B_HIGH, ///< Fractional divider is gated by the PWM B pin
PWM_DIV_B_RISING, ///< Fractional divider advances with each rising edge of the PWM B pin
PWM_DIV_B_FALLING ///< Fractional divider advances with each falling edge of the PWM B pin
PWM_DIV_FREE_RUNNING = 0, ///< Free-running counting at rate dictated by fractional divider
PWM_DIV_B_HIGH = 1, ///< Fractional divider is gated by the PWM B pin
PWM_DIV_B_RISING = 2, ///< Fractional divider advances with each rising edge of the PWM B pin
PWM_DIV_B_FALLING = 3 ///< Fractional divider advances with each falling edge of the PWM B pin
};
enum pwm_chan
@ -144,7 +144,10 @@ static inline void pwm_config_set_clkdiv_int(pwm_config *c, uint div) {
* high level, rising edge or falling edge of the B pin input.
*/
static inline void pwm_config_set_clkdiv_mode(pwm_config *c, enum pwm_clkdiv_mode mode) {
valid_params_if(PWM, mode >= PWM_DIV_FREE_RUNNING && mode <= PWM_DIV_B_FALLING);
valid_params_if(PWM, mode == PWM_DIV_FREE_RUNNING ||
mode == PWM_DIV_B_RISING ||
mode == PWM_DIV_B_HIGH ||
mode == PWM_DIV_B_FALLING);
c->csr = (c->csr & ~PWM_CH0_CSR_DIVMODE_BITS)
| (((uint)mode) << PWM_CH0_CSR_DIVMODE_LSB);
}
@ -414,7 +417,10 @@ static inline void pwm_set_output_polarity(uint slice_num, bool a, bool b) {
*/
static inline void pwm_set_clkdiv_mode(uint slice_num, enum pwm_clkdiv_mode mode) {
check_slice_num_param(slice_num);
valid_params_if(PWM, mode >= PWM_DIV_FREE_RUNNING && mode <= PWM_DIV_B_FALLING);
valid_params_if(PWM, mode == PWM_DIV_FREE_RUNNING ||
mode == PWM_DIV_B_RISING ||
mode == PWM_DIV_B_HIGH ||
mode == PWM_DIV_B_FALLING);
hw_write_masked(&pwm_hw->slice[slice_num].csr, ((uint)mode) << PWM_CH0_CSR_DIVMODE_LSB, PWM_CH0_CSR_DIVMODE_BITS);
}