Add enumvals to busctrl PERFSEL registers
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@ -80,13 +80,54 @@
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// =============================================================================
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// Register : BUSCTRL_PERFSEL0
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// Description : Bus fabric performance event select for PERFCTR0
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// Select a performance event for PERFCTR0
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// Select an event for PERFCTR0. Count either contested accesses,
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// or all accesses, on a downstream port of the main crossbar.
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// 0x00 -> apb_contested
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// 0x01 -> apb
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// 0x02 -> fastperi_contested
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// 0x03 -> fastperi
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// 0x04 -> sram5_contested
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// 0x05 -> sram5
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// 0x06 -> sram4_contested
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// 0x07 -> sram4
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// 0x08 -> sram3_contested
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// 0x09 -> sram3
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// 0x0a -> sram2_contested
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// 0x0b -> sram2
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// 0x0c -> sram1_contested
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// 0x0d -> sram1
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// 0x0e -> sram0_contested
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// 0x0f -> sram0
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// 0x10 -> xip_main_contested
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// 0x11 -> xip_main
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// 0x12 -> rom_contested
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// 0x13 -> rom
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#define BUSCTRL_PERFSEL0_OFFSET 0x0000000c
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#define BUSCTRL_PERFSEL0_BITS 0x0000001f
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#define BUSCTRL_PERFSEL0_RESET 0x0000001f
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#define BUSCTRL_PERFSEL0_MSB 4
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#define BUSCTRL_PERFSEL0_LSB 0
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#define BUSCTRL_PERFSEL0_ACCESS "RW"
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#define BUSCTRL_PERFSEL0_VALUE_APB_CONTESTED 0x00
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#define BUSCTRL_PERFSEL0_VALUE_APB 0x01
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#define BUSCTRL_PERFSEL0_VALUE_FASTPERI_CONTESTED 0x02
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#define BUSCTRL_PERFSEL0_VALUE_FASTPERI 0x03
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#define BUSCTRL_PERFSEL0_VALUE_SRAM5_CONTESTED 0x04
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#define BUSCTRL_PERFSEL0_VALUE_SRAM5 0x05
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#define BUSCTRL_PERFSEL0_VALUE_SRAM4_CONTESTED 0x06
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#define BUSCTRL_PERFSEL0_VALUE_SRAM4 0x07
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#define BUSCTRL_PERFSEL0_VALUE_SRAM3_CONTESTED 0x08
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#define BUSCTRL_PERFSEL0_VALUE_SRAM3 0x09
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#define BUSCTRL_PERFSEL0_VALUE_SRAM2_CONTESTED 0x0a
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#define BUSCTRL_PERFSEL0_VALUE_SRAM2 0x0b
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#define BUSCTRL_PERFSEL0_VALUE_SRAM1_CONTESTED 0x0c
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#define BUSCTRL_PERFSEL0_VALUE_SRAM1 0x0d
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#define BUSCTRL_PERFSEL0_VALUE_SRAM0_CONTESTED 0x0e
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#define BUSCTRL_PERFSEL0_VALUE_SRAM0 0x0f
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#define BUSCTRL_PERFSEL0_VALUE_XIP_MAIN_CONTESTED 0x10
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#define BUSCTRL_PERFSEL0_VALUE_XIP_MAIN 0x11
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#define BUSCTRL_PERFSEL0_VALUE_ROM_CONTESTED 0x12
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#define BUSCTRL_PERFSEL0_VALUE_ROM 0x13
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// =============================================================================
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// Register : BUSCTRL_PERFCTR1
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// Description : Bus fabric performance counter 1
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@ -103,13 +144,54 @@
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// =============================================================================
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// Register : BUSCTRL_PERFSEL1
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// Description : Bus fabric performance event select for PERFCTR1
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// Select a performance event for PERFCTR1
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// Select an event for PERFCTR1. Count either contested accesses,
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// or all accesses, on a downstream port of the main crossbar.
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// 0x00 -> apb_contested
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// 0x01 -> apb
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// 0x02 -> fastperi_contested
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// 0x03 -> fastperi
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// 0x04 -> sram5_contested
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// 0x05 -> sram5
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// 0x06 -> sram4_contested
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// 0x07 -> sram4
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// 0x08 -> sram3_contested
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// 0x09 -> sram3
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// 0x0a -> sram2_contested
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// 0x0b -> sram2
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// 0x0c -> sram1_contested
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// 0x0d -> sram1
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// 0x0e -> sram0_contested
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// 0x0f -> sram0
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// 0x10 -> xip_main_contested
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// 0x11 -> xip_main
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// 0x12 -> rom_contested
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// 0x13 -> rom
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#define BUSCTRL_PERFSEL1_OFFSET 0x00000014
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#define BUSCTRL_PERFSEL1_BITS 0x0000001f
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#define BUSCTRL_PERFSEL1_RESET 0x0000001f
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#define BUSCTRL_PERFSEL1_MSB 4
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#define BUSCTRL_PERFSEL1_LSB 0
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#define BUSCTRL_PERFSEL1_ACCESS "RW"
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#define BUSCTRL_PERFSEL1_VALUE_APB_CONTESTED 0x00
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#define BUSCTRL_PERFSEL1_VALUE_APB 0x01
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#define BUSCTRL_PERFSEL1_VALUE_FASTPERI_CONTESTED 0x02
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#define BUSCTRL_PERFSEL1_VALUE_FASTPERI 0x03
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#define BUSCTRL_PERFSEL1_VALUE_SRAM5_CONTESTED 0x04
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#define BUSCTRL_PERFSEL1_VALUE_SRAM5 0x05
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#define BUSCTRL_PERFSEL1_VALUE_SRAM4_CONTESTED 0x06
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#define BUSCTRL_PERFSEL1_VALUE_SRAM4 0x07
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#define BUSCTRL_PERFSEL1_VALUE_SRAM3_CONTESTED 0x08
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#define BUSCTRL_PERFSEL1_VALUE_SRAM3 0x09
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#define BUSCTRL_PERFSEL1_VALUE_SRAM2_CONTESTED 0x0a
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#define BUSCTRL_PERFSEL1_VALUE_SRAM2 0x0b
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#define BUSCTRL_PERFSEL1_VALUE_SRAM1_CONTESTED 0x0c
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#define BUSCTRL_PERFSEL1_VALUE_SRAM1 0x0d
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#define BUSCTRL_PERFSEL1_VALUE_SRAM0_CONTESTED 0x0e
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#define BUSCTRL_PERFSEL1_VALUE_SRAM0 0x0f
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#define BUSCTRL_PERFSEL1_VALUE_XIP_MAIN_CONTESTED 0x10
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#define BUSCTRL_PERFSEL1_VALUE_XIP_MAIN 0x11
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#define BUSCTRL_PERFSEL1_VALUE_ROM_CONTESTED 0x12
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#define BUSCTRL_PERFSEL1_VALUE_ROM 0x13
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// =============================================================================
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// Register : BUSCTRL_PERFCTR2
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// Description : Bus fabric performance counter 2
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@ -126,13 +208,54 @@
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// =============================================================================
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// Register : BUSCTRL_PERFSEL2
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// Description : Bus fabric performance event select for PERFCTR2
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// Select a performance event for PERFCTR2
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// Select an event for PERFCTR2. Count either contested accesses,
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// or all accesses, on a downstream port of the main crossbar.
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// 0x00 -> apb_contested
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// 0x01 -> apb
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// 0x02 -> fastperi_contested
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// 0x03 -> fastperi
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// 0x04 -> sram5_contested
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// 0x05 -> sram5
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// 0x06 -> sram4_contested
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// 0x07 -> sram4
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// 0x08 -> sram3_contested
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// 0x09 -> sram3
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// 0x0a -> sram2_contested
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// 0x0b -> sram2
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// 0x0c -> sram1_contested
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// 0x0d -> sram1
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// 0x0e -> sram0_contested
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// 0x0f -> sram0
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// 0x10 -> xip_main_contested
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// 0x11 -> xip_main
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// 0x12 -> rom_contested
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// 0x13 -> rom
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#define BUSCTRL_PERFSEL2_OFFSET 0x0000001c
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#define BUSCTRL_PERFSEL2_BITS 0x0000001f
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#define BUSCTRL_PERFSEL2_RESET 0x0000001f
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#define BUSCTRL_PERFSEL2_MSB 4
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#define BUSCTRL_PERFSEL2_LSB 0
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#define BUSCTRL_PERFSEL2_ACCESS "RW"
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#define BUSCTRL_PERFSEL2_VALUE_APB_CONTESTED 0x00
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#define BUSCTRL_PERFSEL2_VALUE_APB 0x01
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#define BUSCTRL_PERFSEL2_VALUE_FASTPERI_CONTESTED 0x02
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#define BUSCTRL_PERFSEL2_VALUE_FASTPERI 0x03
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#define BUSCTRL_PERFSEL2_VALUE_SRAM5_CONTESTED 0x04
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#define BUSCTRL_PERFSEL2_VALUE_SRAM5 0x05
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#define BUSCTRL_PERFSEL2_VALUE_SRAM4_CONTESTED 0x06
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#define BUSCTRL_PERFSEL2_VALUE_SRAM4 0x07
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#define BUSCTRL_PERFSEL2_VALUE_SRAM3_CONTESTED 0x08
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#define BUSCTRL_PERFSEL2_VALUE_SRAM3 0x09
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#define BUSCTRL_PERFSEL2_VALUE_SRAM2_CONTESTED 0x0a
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#define BUSCTRL_PERFSEL2_VALUE_SRAM2 0x0b
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#define BUSCTRL_PERFSEL2_VALUE_SRAM1_CONTESTED 0x0c
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#define BUSCTRL_PERFSEL2_VALUE_SRAM1 0x0d
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#define BUSCTRL_PERFSEL2_VALUE_SRAM0_CONTESTED 0x0e
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#define BUSCTRL_PERFSEL2_VALUE_SRAM0 0x0f
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#define BUSCTRL_PERFSEL2_VALUE_XIP_MAIN_CONTESTED 0x10
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#define BUSCTRL_PERFSEL2_VALUE_XIP_MAIN 0x11
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#define BUSCTRL_PERFSEL2_VALUE_ROM_CONTESTED 0x12
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#define BUSCTRL_PERFSEL2_VALUE_ROM 0x13
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// =============================================================================
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// Register : BUSCTRL_PERFCTR3
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// Description : Bus fabric performance counter 3
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@ -149,12 +272,53 @@
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// =============================================================================
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// Register : BUSCTRL_PERFSEL3
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// Description : Bus fabric performance event select for PERFCTR3
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// Select a performance event for PERFCTR3
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// Select an event for PERFCTR3. Count either contested accesses,
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// or all accesses, on a downstream port of the main crossbar.
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// 0x00 -> apb_contested
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// 0x01 -> apb
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// 0x02 -> fastperi_contested
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// 0x03 -> fastperi
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// 0x04 -> sram5_contested
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// 0x05 -> sram5
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// 0x06 -> sram4_contested
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// 0x07 -> sram4
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// 0x08 -> sram3_contested
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// 0x09 -> sram3
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// 0x0a -> sram2_contested
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// 0x0b -> sram2
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// 0x0c -> sram1_contested
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// 0x0d -> sram1
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// 0x0e -> sram0_contested
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// 0x0f -> sram0
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// 0x10 -> xip_main_contested
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// 0x11 -> xip_main
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// 0x12 -> rom_contested
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// 0x13 -> rom
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#define BUSCTRL_PERFSEL3_OFFSET 0x00000024
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#define BUSCTRL_PERFSEL3_BITS 0x0000001f
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#define BUSCTRL_PERFSEL3_RESET 0x0000001f
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#define BUSCTRL_PERFSEL3_MSB 4
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#define BUSCTRL_PERFSEL3_LSB 0
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#define BUSCTRL_PERFSEL3_ACCESS "RW"
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#define BUSCTRL_PERFSEL3_VALUE_APB_CONTESTED 0x00
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#define BUSCTRL_PERFSEL3_VALUE_APB 0x01
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#define BUSCTRL_PERFSEL3_VALUE_FASTPERI_CONTESTED 0x02
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#define BUSCTRL_PERFSEL3_VALUE_FASTPERI 0x03
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#define BUSCTRL_PERFSEL3_VALUE_SRAM5_CONTESTED 0x04
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#define BUSCTRL_PERFSEL3_VALUE_SRAM5 0x05
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#define BUSCTRL_PERFSEL3_VALUE_SRAM4_CONTESTED 0x06
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#define BUSCTRL_PERFSEL3_VALUE_SRAM4 0x07
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#define BUSCTRL_PERFSEL3_VALUE_SRAM3_CONTESTED 0x08
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#define BUSCTRL_PERFSEL3_VALUE_SRAM3 0x09
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#define BUSCTRL_PERFSEL3_VALUE_SRAM2_CONTESTED 0x0a
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#define BUSCTRL_PERFSEL3_VALUE_SRAM2 0x0b
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#define BUSCTRL_PERFSEL3_VALUE_SRAM1_CONTESTED 0x0c
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#define BUSCTRL_PERFSEL3_VALUE_SRAM1 0x0d
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#define BUSCTRL_PERFSEL3_VALUE_SRAM0_CONTESTED 0x0e
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#define BUSCTRL_PERFSEL3_VALUE_SRAM0 0x0f
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#define BUSCTRL_PERFSEL3_VALUE_XIP_MAIN_CONTESTED 0x10
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#define BUSCTRL_PERFSEL3_VALUE_XIP_MAIN 0x11
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#define BUSCTRL_PERFSEL3_VALUE_ROM_CONTESTED 0x12
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#define BUSCTRL_PERFSEL3_VALUE_ROM 0x13
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// =============================================================================
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#endif // HARDWARE_REGS_BUSCTRL_DEFINED
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@ -22556,7 +22556,89 @@
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<field>
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<access>read-write</access>
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<bitRange>[4:0]</bitRange>
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<description>Select a performance event for PERFCTR0</description>
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<description>Select an event for PERFCTR0. Count either contested accesses, or all accesses, on a downstream port of the main crossbar.</description>
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<enumeratedValues>
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<enumeratedValue>
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<name>apb_contested</name>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>apb</name>
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<value>1</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>fastperi_contested</name>
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<value>2</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>fastperi</name>
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<value>3</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram5_contested</name>
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<value>4</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram5</name>
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<value>5</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram4_contested</name>
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<value>6</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram4</name>
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<value>7</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram3_contested</name>
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<value>8</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram3</name>
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<value>9</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram2_contested</name>
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<value>10</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram2</name>
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<value>11</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram1_contested</name>
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<value>12</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram1</name>
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<value>13</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram0_contested</name>
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<value>14</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram0</name>
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<value>15</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>xip_main_contested</name>
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<value>16</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>xip_main</name>
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<value>17</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>rom_contested</name>
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<value>18</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>rom</name>
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<value>19</value>
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</enumeratedValue>
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</enumeratedValues>
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<name>PERFSEL0</name>
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</field>
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</fields>
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@ -22587,7 +22669,89 @@
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<field>
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<access>read-write</access>
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<bitRange>[4:0]</bitRange>
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<description>Select a performance event for PERFCTR1</description>
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<description>Select an event for PERFCTR1. Count either contested accesses, or all accesses, on a downstream port of the main crossbar.</description>
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<enumeratedValues>
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<enumeratedValue>
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<name>apb_contested</name>
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<value>0</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>apb</name>
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<value>1</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>fastperi_contested</name>
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<value>2</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>fastperi</name>
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<value>3</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram5_contested</name>
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<value>4</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram5</name>
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<value>5</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram4_contested</name>
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<value>6</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram4</name>
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<value>7</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram3_contested</name>
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<value>8</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram3</name>
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<value>9</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram2_contested</name>
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<value>10</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram2</name>
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<value>11</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram1_contested</name>
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<value>12</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram1</name>
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<value>13</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram0_contested</name>
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<value>14</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>sram0</name>
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<value>15</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>xip_main_contested</name>
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<value>16</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>xip_main</name>
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<value>17</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>rom_contested</name>
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<value>18</value>
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</enumeratedValue>
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<enumeratedValue>
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<name>rom</name>
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<value>19</value>
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</enumeratedValue>
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</enumeratedValues>
|
||||
<name>PERFSEL1</name>
|
||||
</field>
|
||||
</fields>
|
||||
@ -22618,7 +22782,89 @@
|
||||
<field>
|
||||
<access>read-write</access>
|
||||
<bitRange>[4:0]</bitRange>
|
||||
<description>Select a performance event for PERFCTR2</description>
|
||||
<description>Select an event for PERFCTR2. Count either contested accesses, or all accesses, on a downstream port of the main crossbar.</description>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>apb_contested</name>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>apb</name>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>fastperi_contested</name>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>fastperi</name>
|
||||
<value>3</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram5_contested</name>
|
||||
<value>4</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram5</name>
|
||||
<value>5</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram4_contested</name>
|
||||
<value>6</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram4</name>
|
||||
<value>7</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram3_contested</name>
|
||||
<value>8</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram3</name>
|
||||
<value>9</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram2_contested</name>
|
||||
<value>10</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram2</name>
|
||||
<value>11</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram1_contested</name>
|
||||
<value>12</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram1</name>
|
||||
<value>13</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram0_contested</name>
|
||||
<value>14</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram0</name>
|
||||
<value>15</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>xip_main_contested</name>
|
||||
<value>16</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>xip_main</name>
|
||||
<value>17</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>rom_contested</name>
|
||||
<value>18</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>rom</name>
|
||||
<value>19</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
<name>PERFSEL2</name>
|
||||
</field>
|
||||
</fields>
|
||||
@ -22649,7 +22895,89 @@
|
||||
<field>
|
||||
<access>read-write</access>
|
||||
<bitRange>[4:0]</bitRange>
|
||||
<description>Select a performance event for PERFCTR3</description>
|
||||
<description>Select an event for PERFCTR3. Count either contested accesses, or all accesses, on a downstream port of the main crossbar.</description>
|
||||
<enumeratedValues>
|
||||
<enumeratedValue>
|
||||
<name>apb_contested</name>
|
||||
<value>0</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>apb</name>
|
||||
<value>1</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>fastperi_contested</name>
|
||||
<value>2</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>fastperi</name>
|
||||
<value>3</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram5_contested</name>
|
||||
<value>4</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram5</name>
|
||||
<value>5</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram4_contested</name>
|
||||
<value>6</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram4</name>
|
||||
<value>7</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram3_contested</name>
|
||||
<value>8</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram3</name>
|
||||
<value>9</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram2_contested</name>
|
||||
<value>10</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram2</name>
|
||||
<value>11</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram1_contested</name>
|
||||
<value>12</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram1</name>
|
||||
<value>13</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram0_contested</name>
|
||||
<value>14</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>sram0</name>
|
||||
<value>15</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>xip_main_contested</name>
|
||||
<value>16</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>xip_main</name>
|
||||
<value>17</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>rom_contested</name>
|
||||
<value>18</value>
|
||||
</enumeratedValue>
|
||||
<enumeratedValue>
|
||||
<name>rom</name>
|
||||
<value>19</value>
|
||||
</enumeratedValue>
|
||||
</enumeratedValues>
|
||||
<name>PERFSEL3</name>
|
||||
</field>
|
||||
</fields>
|
||||
|
Loading…
Reference in New Issue
Block a user