Add doxygen clarifying PWM behaviour when enabled/disabled, and advice for controlling the pin state when disabled (#521)
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@ -441,8 +441,28 @@ static inline void pwm_set_phase_correct(uint slice_num, bool phase_correct) {
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/** \brief Enable/Disable PWM
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* \ingroup hardware_pwm
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*
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* When a PWM is disabled, it halts its counter, and the output pins are left
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* high or low depending on exactly when the counter is halted. When
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* re-enabled the PWM resumes immediately from where it left off.
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*
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* If the PWM's output pins need to be low when halted:
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*
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* - The counter compare can be set to zero whilst the PWM is enabled, and
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* then the PWM disabled once both pins are seen to be low
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*
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* - The GPIO output overrides can be used to force the actual pins low
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*
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* - The PWM can be run for one cycle (i.e. enabled then immediately disabled)
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* with a TOP of 0, count of 0 and counter compare of 0, to force the pins
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* low when the PWM has already been halted. The same method can be used
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* with a counter compare value of 1 to force a pin high.
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*
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* Note that, when disabled, the PWM can still be advanced one count at a time
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* by pulsing the PH_ADV bit in its CSR. The output pins transition as though
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* the PWM were enabled.
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*
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* \param slice_num PWM slice number
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* \param enabled true to enable the specified PWM, false to disable
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* \param enabled true to enable the specified PWM, false to disable.
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*/
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static inline void pwm_set_enabled(uint slice_num, bool enabled) {
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check_slice_num_param(slice_num);
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