From c1f164b9fdc6008afcc65295facafd3271a23e95 Mon Sep 17 00:00:00 2001 From: Tom Wasiluk Date: Wed, 24 Mar 2021 15:35:02 +0100 Subject: [PATCH] corrected clk_gpout3 to gpio pin 25 as per the rp2040 datasheet (#250) --- src/rp2_common/hardware_clocks/clocks.c | 2 +- src/rp2_common/hardware_clocks/include/hardware/clocks.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/rp2_common/hardware_clocks/clocks.c b/src/rp2_common/hardware_clocks/clocks.c index 848e878..ac11680 100644 --- a/src/rp2_common/hardware_clocks/clocks.c +++ b/src/rp2_common/hardware_clocks/clocks.c @@ -322,7 +322,7 @@ void clock_gpio_init(uint gpio, uint src, uint div) { if (gpio == 21) gpclk = clk_gpout0; else if (gpio == 23) gpclk = clk_gpout1; else if (gpio == 24) gpclk = clk_gpout2; - else if (gpio == 26) gpclk = clk_gpout3; + else if (gpio == 25) gpclk = clk_gpout3; else { invalid_params_if(CLOCKS, true); } diff --git a/src/rp2_common/hardware_clocks/include/hardware/clocks.h b/src/rp2_common/hardware_clocks/include/hardware/clocks.h index 297dfa2..04d373d 100644 --- a/src/rp2_common/hardware_clocks/include/hardware/clocks.h +++ b/src/rp2_common/hardware_clocks/include/hardware/clocks.h @@ -170,7 +170,7 @@ void clocks_enable_resus(resus_callback_t resus_callback); /*! \brief Output an optionally divided clock to the specified gpio pin. * \ingroup hardware_clocks * - * \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 26. These GPIOs are connected to the GPOUT0-3 clock generators. + * \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 25. These GPIOs are connected to the GPOUT0-3 clock generators. * \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator. * \param div The amount to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock. */