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5d422deed1
commit
e1c5fd34e4
@ -41,7 +41,7 @@ void pll_init(PLL pll, uint refdiv, uint vco_freq, uint post_div1, uint post_div
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if ((pll->cs & PLL_CS_LOCK_BITS) &&
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if ((pll->cs & PLL_CS_LOCK_BITS) &&
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(refdiv == (pll->cs & PLL_CS_REFDIV_BITS)) &&
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(refdiv == (pll->cs & PLL_CS_REFDIV_BITS)) &&
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(fbdiv == (pll->fbdiv_int & PLL_FBDIV_INT_BITS)) &&
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(fbdiv == (pll->fbdiv_int & PLL_FBDIV_INT_BITS)) &&
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(pdiv == (pll->prim & (PLL_PRIM_POSTDIV1_BITS & PLL_PRIM_POSTDIV2_BITS)))) {
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(pdiv == (pll->prim & (PLL_PRIM_POSTDIV1_BITS | PLL_PRIM_POSTDIV2_BITS)))) {
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// do not disrupt PLL that is already correctly configured and operating
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// do not disrupt PLL that is already correctly configured and operating
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return;
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return;
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}
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}
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