6d87da4c59
- Add recursive_mutex - Make all locking primitives and sleep use common overridable wait/notify support to allow RTOS implementations to replace WFE/SEV with something more appropriate - Add busy_wait_ms
226 lines
8.1 KiB
C
226 lines
8.1 KiB
C
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "hardware/timer.h"
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#include "hardware/irq.h"
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#include "hardware/sync.h"
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#include "hardware/claim.h"
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check_hw_layout(timer_hw_t, ints, TIMER_INTS_OFFSET);
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static hardware_alarm_callback_t alarm_callbacks[NUM_TIMERS];
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static uint32_t target_hi[NUM_TIMERS];
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static uint8_t timer_callbacks_pending;
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static_assert(NUM_TIMERS <= 4, "");
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static uint8_t claimed;
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void hardware_alarm_claim(uint alarm_num) {
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check_hardware_alarm_num_param(alarm_num);
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hw_claim_or_assert(&claimed, alarm_num, "Hardware alarm %d already claimed");
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}
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void hardware_alarm_unclaim(uint alarm_num) {
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check_hardware_alarm_num_param(alarm_num);
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hw_claim_clear(&claimed, alarm_num);
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}
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/// tag::time_us_64[]
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uint64_t time_us_64() {
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// Need to make sure that the upper 32 bits of the timer
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// don't change, so read that first
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uint32_t hi = timer_hw->timerawh;
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uint32_t lo;
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do {
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// Read the lower 32 bits
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lo = timer_hw->timerawl;
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// Now read the upper 32 bits again and
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// check that it hasn't incremented. If it has loop around
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// and read the lower 32 bits again to get an accurate value
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uint32_t next_hi = timer_hw->timerawh;
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if (hi == next_hi) break;
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hi = next_hi;
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} while (true);
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return ((uint64_t) hi << 32u) | lo;
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}
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/// end::time_us_64[]
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/// \tag::busy_wait[]
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void busy_wait_us_32(uint32_t delay_us) {
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if (0 <= (int32_t)delay_us) {
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// we only allow 31 bits, otherwise we could have a race in the loop below with
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// values very close to 2^32
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uint32_t start = timer_hw->timerawl;
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while (timer_hw->timerawl - start < delay_us) {
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tight_loop_contents();
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}
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} else {
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busy_wait_us(delay_us);
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}
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}
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void busy_wait_us(uint64_t delay_us) {
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uint64_t base = time_us_64();
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uint64_t target = base + delay_us;
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if (target < base) {
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target = (uint64_t)-1;
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}
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absolute_time_t t;
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update_us_since_boot(&t, target);
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busy_wait_until(t);
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}
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void busy_wait_ms(uint32_t delay_ms)
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{
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if (delay_ms <= 0x7fffffffu / 1000) {
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busy_wait_us_32(delay_ms * 1000);
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} else {
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busy_wait_us(delay_ms * 1000ull);
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}
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}
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void busy_wait_until(absolute_time_t t) {
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uint64_t target = to_us_since_boot(t);
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uint32_t hi_target = (uint32_t)(target >> 32u);
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uint32_t hi = timer_hw->timerawh;
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while (hi < hi_target) {
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hi = timer_hw->timerawh;
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tight_loop_contents();
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}
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while (hi == hi_target && timer_hw->timerawl < (uint32_t) target) {
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hi = timer_hw->timerawh;
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tight_loop_contents();
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}
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}
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/// \end::busy_wait[]
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static inline uint harware_alarm_irq_number(uint alarm_num) {
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return TIMER_IRQ_0 + alarm_num;
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}
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static void hardware_alarm_irq_handler(void) {
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// Determine which timer this IRQ is for
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uint32_t ipsr;
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__asm volatile ("mrs %0, ipsr" : "=r" (ipsr)::);
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uint alarm_num = (ipsr & 0x3fu) - 16 - TIMER_IRQ_0;
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check_hardware_alarm_num_param(alarm_num);
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hardware_alarm_callback_t callback = NULL;
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spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_TIMER);
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uint32_t save = spin_lock_blocking(lock);
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// Clear the timer IRQ (inside lock, because we check whether we have handled the IRQ yet in alarm_set by looking at the interrupt status
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timer_hw->intr = 1u << alarm_num;
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// make sure the IRQ is still valid
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if (timer_callbacks_pending & (1u << alarm_num)) {
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// Now check whether we have a timer event to handle that isn't already obsolete (this could happen if we
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// were already in the IRQ handler before someone else changed the timer setup
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if (timer_hw->timerawh >= target_hi[alarm_num]) {
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// we have reached the right high word as well as low word value
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callback = alarm_callbacks[alarm_num];
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timer_callbacks_pending &= (uint8_t)~(1u << alarm_num);
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} else {
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// try again in 2^32 us
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timer_hw->alarm[alarm_num] = timer_hw->alarm[alarm_num]; // re-arm the timer
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}
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}
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spin_unlock(lock, save);
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if (callback) {
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callback(alarm_num);
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}
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}
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void hardware_alarm_set_callback(uint alarm_num, hardware_alarm_callback_t callback) {
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// todo check current core owner
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// note this should probably be subsumed by irq_set_exclusive_handler anyway, since that
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// should disallow IRQ handlers on both cores
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check_hardware_alarm_num_param(alarm_num);
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uint irq_num = harware_alarm_irq_number(alarm_num);
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spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_TIMER);
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uint32_t save = spin_lock_blocking(lock);
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if (callback) {
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if (hardware_alarm_irq_handler != irq_get_vtable_handler(irq_num)) {
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// note that set_exclusive will silently allow you to set the handler to the same thing
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// since it is idempotent, which means we don't need to worry about locking ourselves
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irq_set_exclusive_handler(irq_num, hardware_alarm_irq_handler);
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irq_set_enabled(irq_num, true);
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// Enable interrupt in block and at processor
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hw_set_bits(&timer_hw->inte, 1u << alarm_num);
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}
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alarm_callbacks[alarm_num] = callback;
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} else {
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alarm_callbacks[alarm_num] = NULL;
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timer_callbacks_pending &= (uint8_t)~(1u << alarm_num);
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irq_remove_handler(irq_num, hardware_alarm_irq_handler);
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irq_set_enabled(irq_num, false);
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}
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spin_unlock(lock, save);
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}
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bool hardware_alarm_set_target(uint alarm_num, absolute_time_t target) {
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bool missed;
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uint64_t now = time_us_64();
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uint64_t t = to_us_since_boot(target);
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if (now >= t) {
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missed = true;
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} else {
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missed = false;
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// 1) actually set the hardware timer
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spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_TIMER);
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uint32_t save = spin_lock_blocking(lock);
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uint8_t old_timer_callbacks_pending = timer_callbacks_pending;
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timer_callbacks_pending |= (uint8_t)(1u << alarm_num);
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timer_hw->intr = 1u << alarm_num; // clear any IRQ
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timer_hw->alarm[alarm_num] = (uint32_t) t;
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// Set the alarm. Writing time should arm it
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target_hi[alarm_num] = (uint32_t)(t >> 32u);
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// 2) check for races
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if (!(timer_hw->armed & 1u << alarm_num)) {
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// not armed, so has already fired .. IRQ must be pending (we are still under lock)
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assert(timer_hw->ints & 1u << alarm_num);
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} else {
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if (time_us_64() >= t) {
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// we are already at or past the right time; there is no point in us racing against the IRQ
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// we are about to generate. note however that, if there was already a timer pending before,
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// then we still let the IRQ fire, as whatever it was, is not handled by our setting missed=true here
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missed = true;
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if (timer_callbacks_pending != old_timer_callbacks_pending) {
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// disarm the timer
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timer_hw->armed = 1u << alarm_num;
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// clear the IRQ...
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timer_hw->intr = 1u << alarm_num;
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// ... including anything pending on the processor - perhaps unnecessary, but
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// our timer flag says we aren't expecting anything.
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irq_clear(harware_alarm_irq_number(alarm_num));
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// and clear our flag so that if the IRQ handler is already active (because it is on
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// the other core) it will also skip doing anything
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timer_callbacks_pending = old_timer_callbacks_pending;
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}
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}
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}
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spin_unlock(lock, save);
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// note at this point any pending timer IRQ can likely run
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}
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return missed;
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}
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void hardware_alarm_cancel(uint alarm_num) {
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check_hardware_alarm_num_param(alarm_num);
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spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_TIMER);
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uint32_t save = spin_lock_blocking(lock);
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timer_hw->armed = 1u << alarm_num;
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timer_callbacks_pending &= (uint8_t)~(1u << alarm_num);
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spin_unlock(lock, save);
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}
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