elf2uf2: fix breakage for no_flash builds; removep 0xFFFFFFFF constantds and error messsage
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cfff23c5a3
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1822d113d9
@ -255,18 +255,18 @@ int elf2uf2(FILE *in, FILE *out) {
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}
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uint page_num = 0;
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if (ram_style) {
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uint32_t expected_ep_main_ram = 0xFFFFFFFF;
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uint32_t expected_ep_xip_sram = 0xFFFFFFFF;
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uint32_t expected_ep_main_ram = UINT32_MAX;
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uint32_t expected_ep_xip_sram = UINT32_MAX;
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for(auto& page_entry : pages) {
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if ( ((page_entry.first >= MAIN_RAM_START) && (page_entry.first < (MAIN_RAM_START + MAIN_RAM_END))) && (page_entry.first < expected_ep_main_ram) ) {
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expected_ep_main_ram = page_entry.first | 0x1;
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} else if ( ((page_entry.first >= XIP_SRAM_START) && (page_entry.first < (XIP_SRAM_START + XIP_SRAM_END))) && (page_entry.first < expected_ep_xip_sram) ) {
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expected_ep_xip_sram = pages.begin()->first | 0x1;
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expected_ep_xip_sram = page_entry.first | 0x1;
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}
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}
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uint32_t expected_ep = (0xFFFFFFFF != expected_ep_main_ram) ? expected_ep_main_ram : expected_ep_xip_sram;
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uint32_t expected_ep = (UINT32_MAX != expected_ep_main_ram) ? expected_ep_main_ram : expected_ep_xip_sram;
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if (eh.entry == expected_ep_xip_sram) {
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return fail(ERROR_INCOMPATIBLE, "B0/B1 Boot RAM errata prevents entry into XIP_SRAM\n");
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return fail(ERROR_INCOMPATIBLE, "B0/B1 Boot ROM does not support direct entry into XIP_SRAM\n");
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} else if (eh.entry != expected_ep) {
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return fail(ERROR_INCOMPATIBLE, "A RAM binary should have an entry point at the beginning: %08x (not %08x)\n", expected_ep, eh.entry);
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}
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