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Fixup another level of compiler warnings, add _U() definition

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This commit is contained in:
graham sanderson 2021-02-19 12:05:13 -06:00 committed by Graham Sanderson
parent be13f591d0
commit 41c0e9f3b9
46 changed files with 269 additions and 223 deletions
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2
src/common/pico_base/include/pico/types.h
View File

@ -76,4 +76,6 @@ typedef struct {
int8_t sec; ///< 0..59
} datetime_t;
#define bool_to_bit(x) ((uint)!!(x))
#endif

2
src/common/pico_sync/critical_section.c
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@ -11,7 +11,7 @@ static_assert(sizeof(critical_section_t) == 8, "");
#endif
void critical_section_init(critical_section_t *critsec) {
critical_section_init_with_lock_num(critsec, spin_lock_claim_unused(true));
critical_section_init_with_lock_num(critsec, (uint)spin_lock_claim_unused(true));
}
void critical_section_init_with_lock_num(critical_section_t *critsec, uint lock_num) {

8
src/common/pico_sync/mutex.c
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@ -23,7 +23,7 @@ void __time_critical_func(mutex_enter_blocking)(mutex_t *mtx) {
do {
uint32_t save = spin_lock_blocking(mtx->core.spin_lock);
if (mtx->owner < 0) {
mtx->owner = get_core_num();
mtx->owner = (int8_t)get_core_num();
block = false;
}
spin_unlock(mtx->core.spin_lock, save);
@ -37,10 +37,10 @@ bool __time_critical_func(mutex_try_enter)(mutex_t *mtx, uint32_t *owner_out) {
bool entered;
uint32_t save = spin_lock_blocking(mtx->core.spin_lock);
if (mtx->owner < 0) {
mtx->owner = get_core_num();
mtx->owner = (int8_t)get_core_num();
entered = true;
} else {
if (owner_out) *owner_out = mtx->owner;
if (owner_out) *owner_out = (uint32_t) mtx->owner;
entered = false;
}
spin_unlock(mtx->core.spin_lock, save);
@ -57,7 +57,7 @@ bool __time_critical_func(mutex_enter_block_until)(mutex_t *mtx, absolute_time_t
do {
uint32_t save = spin_lock_blocking(mtx->core.spin_lock);
if (mtx->owner < 0) {
mtx->owner = get_core_num();
mtx->owner = (int8_t)get_core_num();
block = false;
}
spin_unlock(mtx->core.spin_lock, save);

2
src/common/pico_sync/sem.c
View File

@ -63,7 +63,7 @@ bool __time_critical_func(sem_release)(semaphore_t *sem) {
uint32_t save = spin_lock_blocking(sem->core.spin_lock);
int32_t count = sem->permits;
if (count < sem->max_permits) {
sem->permits = count + 1;
sem->permits = (int16_t)(count + 1);
__sev();
rc = true;
} else {

2
src/common/pico_time/include/pico/time.h
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@ -152,7 +152,7 @@ static inline absolute_time_t make_timeout_time_ms(uint32_t ms) {
* in case of overflow)
*/
static inline int64_t absolute_time_diff_us(absolute_time_t from, absolute_time_t to) {
return to_us_since_boot(to) - to_us_since_boot(from);
return (int64_t)(to_us_since_boot(to) - to_us_since_boot(from));
}
/*! \brief The timestamp representing the end of time; no timestamp is after this

23
src/common/pico_time/time.c
View File

@ -71,12 +71,12 @@ bool timer_pool_entry_comparator(void *user_data, pheap_node_id_t a, pheap_node_
}
static inline alarm_id_t make_public_id(uint8_t id_high, pheap_node_id_t id) {
return ((uint)id_high << 8u * sizeof(id)) | id;
return (alarm_id_t)(((uint)id_high << 8u * sizeof(id)) | id);
}
static alarm_id_t add_alarm_under_lock(alarm_pool_t *pool, absolute_time_t time, alarm_callback_t callback,
void *user_data, alarm_id_t reuse_id, bool create_if_past, bool *missed) {
alarm_id_t id;
static pheap_node_id_t add_alarm_under_lock(alarm_pool_t *pool, absolute_time_t time, alarm_callback_t callback,
void *user_data, pheap_node_id_t reuse_id, bool create_if_past, bool *missed) {
pheap_node_id_t id;
if (reuse_id) {
assert(!ph_contains(pool->heap, reuse_id));
id = reuse_id;
@ -137,10 +137,10 @@ static void alarm_pool_alarm_callback(uint alarm_num) {
// todo think more about whether we want to keep calling
if (repeat < 0 && pool->alarm_in_progress) {
assert(pool->alarm_in_progress == make_public_id(id_high, next_id));
add_alarm_under_lock(pool, delayed_by_us(target, -repeat), callback, user_data, next_id, true, NULL);
add_alarm_under_lock(pool, delayed_by_us(target, (uint64_t)-repeat), callback, user_data, next_id, true, NULL);
} else if (repeat > 0 && pool->alarm_in_progress) {
assert(pool->alarm_in_progress == make_public_id(id_high, next_id));
add_alarm_under_lock(pool, delayed_by_us(get_absolute_time(), repeat), callback, user_data, next_id,
add_alarm_under_lock(pool, delayed_by_us(get_absolute_time(), (uint64_t)repeat), callback, user_data, next_id,
true, NULL);
} else {
// need to return the id to the heap
@ -164,7 +164,7 @@ alarm_pool_t *alarm_pool_create(uint hardware_alarm_num, uint max_timers) {
pool->heap = ph_create(max_timers, timer_pool_entry_comparator, pool);
pool->entries = (alarm_pool_entry_t *)calloc(max_timers, sizeof(alarm_pool_entry_t));
pool->entry_ids_high = (uint8_t *)calloc(max_timers, sizeof(uint8_t));
pool->hardware_alarm_num = hardware_alarm_num;
pool->hardware_alarm_num = (uint8_t)hardware_alarm_num;
pools[hardware_alarm_num] = pool;
return pool;
}
@ -185,7 +185,7 @@ alarm_id_t alarm_pool_add_alarm_at(alarm_pool_t *pool, absolute_time_t time, ala
void *user_data, bool fire_if_past) {
bool missed = false;
uint public_id;
alarm_id_t public_id;
do {
uint8_t id_high = 0;
uint32_t save = spin_lock_blocking(pool->lock);
@ -205,9 +205,9 @@ alarm_id_t alarm_pool_add_alarm_at(alarm_pool_t *pool, absolute_time_t time, ala
public_id = 0;
break;
} else if (repeat < 0) {
time = delayed_by_us(time, -repeat);
time = delayed_by_us(time, (uint64_t)-repeat);
} else {
time = delayed_by_us(get_absolute_time(), repeat);
time = delayed_by_us(get_absolute_time(), (uint64_t)repeat);
}
} else {
break;
@ -270,7 +270,8 @@ bool alarm_pool_add_repeating_timer_us(alarm_pool_t *pool, int64_t delay_us, rep
out->callback = callback;
out->delay_us = delay_us;
out->user_data = user_data;
out->alarm_id = alarm_pool_add_alarm_at(pool, make_timeout_time_us(delay_us >= 0 ? delay_us : -delay_us), repeating_timer_callback, out, true);
out->alarm_id = alarm_pool_add_alarm_at(pool, make_timeout_time_us((uint64_t)(delay_us >= 0 ? delay_us : -delay_us)),
repeating_timer_callback, out, true);
return out->alarm_id > 0;
}

2
src/common/pico_util/include/pico/util/queue.h
View File

@ -71,7 +71,7 @@ static inline uint queue_get_level_unsafe(queue_t *q) {
if (rc < 0) {
rc += + q->element_count + 1;
}
return rc;
return (uint)rc;
}
/*! \brief Check of level of the specified queue.

6
src/common/pico_util/pheap.c
View File

@ -11,7 +11,7 @@
pheap_t *ph_create(uint max_nodes, pheap_comparator comparator, void *user_data) {
invalid_params_if(PHEAP, !max_nodes || max_nodes >= (1u << sizeof(pheap_node_id_t)));
pheap_t *heap = calloc(1, sizeof(pheap_t));
heap->max_nodes = max_nodes;
heap->max_nodes = (pheap_node_id_t) max_nodes;
heap->comparator = comparator;
heap->nodes = calloc(max_nodes, sizeof(pheap_node_t));
heap->user_data = user_data;
@ -23,8 +23,8 @@ void ph_clear(pheap_t *heap) {
heap->root_id = 0;
heap->free_head_id = 1;
heap->free_tail_id = heap->max_nodes;
for(uint i = 1; i < heap->max_nodes; i++) {
ph_get_node(heap, i)->sibling = i + 1;
for(pheap_node_id_t i = 1; i < heap->max_nodes; i++) {
ph_get_node(heap, i)->sibling = (pheap_node_id_t)(i + 1);
}
ph_get_node(heap, heap->max_nodes)->sibling = 0;
}

4
src/common/pico_util/queue.c
View File

@ -11,8 +11,8 @@
void queue_init_with_spinlock(queue_t *q, uint element_size, uint element_count, uint spinlock_num) {
q->lock = spin_lock_instance(spinlock_num);
q->data = (uint8_t *)calloc(element_count + 1, element_size);
q->element_count = element_count;
q->element_size = element_size;
q->element_count = (uint16_t)element_count;
q->element_size = (uint16_t)element_size;
q->wptr = 0;
q->rptr = 0;
}

4
src/host/pico_platform/include/hardware/platform_defs.h
View File

@ -21,4 +21,8 @@
#define NUM_SPIN_LOCKS 32u
#ifndef _U
#define _U(x) x ## u
#endif
#endif

8
src/rp2040/hardware_regs/include/hardware/platform_defs.h
View File

@ -40,6 +40,14 @@
#define PICO_NO_RAM_VECTOR_TABLE 0
#endif
#ifndef _U
#ifdef __ASSEMBLER__
#define _U(x) x
#else
#define _U(x) x ## u
#endif
#endif
#ifndef PICO_FLASH_SIZE_BYTES
#define PICO_FLASH_SIZE_BYTES (2 * 1024 * 1024)
#endif

18
src/rp2_common/hardware_adc/include/hardware/adc.h
View File

@ -127,7 +127,7 @@ static inline uint16_t adc_read(void) {
while (!(adc_hw->cs & ADC_CS_READY_BITS))
tight_loop_contents();
return adc_hw->result;
return (uint16_t) adc_hw->result;
}
/*! \brief Enable or disable free-running sampling mode
@ -166,13 +166,13 @@ static inline void adc_set_clkdiv(float clkdiv) {
* \param err_in_fifo If enabled, bit 15 of the FIFO contains error flag for each sample
* \param byte_shift Shift FIFO contents to be one byte in size (for byte DMA) - enables DMA to byte buffers.
*/
static inline void adc_fifo_setup(bool en, bool dreq_en, uint16_t dreq_thresh, bool err_in_fifo, bool byte_shift) {
static inline void adc_fifo_setup(bool en, bool dreq_en, uint16_t dreq_thresh, bool err_in_fifo, bool byte_shift) {
hw_write_masked(&adc_hw->fcs,
(!!en << ADC_FCS_EN_LSB) |
(!!dreq_en << ADC_FCS_DREQ_EN_LSB) |
(dreq_thresh << ADC_FCS_THRESH_LSB) |
(!!err_in_fifo << ADC_FCS_ERR_LSB) |
(!!byte_shift << ADC_FCS_SHIFT_LSB),
(bool_to_bit(en) << ADC_FCS_EN_LSB) |
(bool_to_bit(dreq_en) << ADC_FCS_DREQ_EN_LSB) |
(((uint)dreq_thresh) << ADC_FCS_THRESH_LSB) |
(bool_to_bit(err_in_fifo) << ADC_FCS_ERR_LSB) |
(bool_to_bit(byte_shift) << ADC_FCS_SHIFT_LSB),
ADC_FCS_EN_BITS |
ADC_FCS_DREQ_EN_BITS |
ADC_FCS_THRESH_BITS |
@ -205,7 +205,7 @@ static inline uint8_t adc_fifo_get_level(void) {
* Pops the latest result from the ADC FIFO.
*/
static inline uint16_t adc_fifo_get(void) {
return adc_hw->fifo;
return (uint16_t)adc_hw->fifo;
}
/*! \brief Wait for the ADC FIFO to have data.
@ -216,7 +216,7 @@ static inline uint16_t adc_fifo_get(void) {
static inline uint16_t adc_fifo_get_blocking(void) {
while (adc_fifo_is_empty())
tight_loop_contents();
return adc_hw->fifo;
return (uint16_t)adc_hw->fifo;
}
/*! \brief Drain the ADC FIFO

10
src/rp2_common/hardware_claim/claim.c
View File

@ -20,7 +20,7 @@ bool hw_is_claimed(uint8_t *bits, uint bit_index) {
if (bits[bit_index >> 3u] & (1u << (bit_index & 7u))) {
rc = false;
} else {
bits[bit_index >> 3u] |= (1u << (bit_index & 7u));
bits[bit_index >> 3u] |= (uint8_t)(1u << (bit_index & 7u));
rc = true;
}
hw_claim_unlock(save);
@ -32,7 +32,7 @@ void hw_claim_or_assert(uint8_t *bits, uint bit_index, const char *message) {
if (bits[bit_index >> 3u] & (1u << (bit_index & 7u))) {
panic(message, bit_index);
} else {
bits[bit_index >> 3u] |= (1u << (bit_index & 7u));
bits[bit_index >> 3u] |= (uint8_t)(1u << (bit_index & 7u));
}
hw_claim_unlock(save);
}
@ -43,8 +43,8 @@ int hw_claim_unused_from_range(uint8_t *bits, bool required, uint bit_lsb, uint
int found_bit = -1;
for(uint bit=bit_lsb; bit <= bit_msb; bit++) {
if (!(bits[bit >> 3u] & (1u << (bit & 7u)))) {
bits[bit >> 3u] |= (1u << (bit & 7u));
found_bit = bit;
bits[bit >> 3u] |= (uint8_t)(1u << (bit & 7u));
found_bit = (int)bit;
break;
}
}
@ -58,7 +58,7 @@ int hw_claim_unused_from_range(uint8_t *bits, bool required, uint bit_lsb, uint
void hw_claim_clear(uint8_t *bits, uint bit_index) {
uint32_t save = hw_claim_lock();
assert(bits[bit_index >> 3u] & (1u << (bit_index & 7u)));
bits[bit_index >> 3u] &= ~(1u << (bit_index & 7u));
bits[bit_index >> 3u] &= (uint8_t) ~(1u << (bit_index & 7u));
hw_claim_unlock(save);
}

16
src/rp2_common/hardware_divider/include/hardware/divider.h
View File

@ -53,8 +53,8 @@ typedef uint64_t divmod_result_t;
*/
static inline void hw_divider_divmod_s32_start(int32_t a, int32_t b) {
check_hw_layout( sio_hw_t, div_sdividend, SIO_DIV_SDIVIDEND_OFFSET);
sio_hw->div_sdividend = a;
sio_hw->div_sdivisor = b;
sio_hw->div_sdividend = (uint32_t)a;
sio_hw->div_sdivisor = (uint32_t)b;
}
/*! \brief Start an unsigned asynchronous divide
@ -142,7 +142,7 @@ static inline uint32_t hw_divider_u32_quotient_wait(void) {
*/
static inline int32_t hw_divider_s32_quotient_wait(void) {
hw_divider_wait_ready();
return sio_hw->div_quotient;
return (int32_t)sio_hw->div_quotient;
}
/*! \brief Return result of last asynchronous HW divide, unsigned remainder only
@ -154,7 +154,7 @@ static inline int32_t hw_divider_s32_quotient_wait(void) {
*/
static inline uint32_t hw_divider_u32_remainder_wait(void) {
hw_divider_wait_ready();
int32_t rc = sio_hw->div_remainder;
uint32_t rc = sio_hw->div_remainder;
sio_hw->div_quotient; // must read quotient to cooperate with other SDK code
return rc;
}
@ -168,7 +168,7 @@ static inline uint32_t hw_divider_u32_remainder_wait(void) {
*/
static inline int32_t hw_divider_s32_remainder_wait(void) {
hw_divider_wait_ready();
int32_t rc = sio_hw->div_remainder;
int32_t rc = (int32_t)sio_hw->div_remainder;
sio_hw->div_quotient; // must read quotient to cooperate with other SDK code
return rc;
}
@ -334,7 +334,7 @@ static inline uint32_t hw_divider_u32_quotient_inlined(uint32_t a, uint32_t b) {
static inline uint32_t hw_divider_u32_remainder_inlined(uint32_t a, uint32_t b) {
hw_divider_divmod_u32_start(a, b);
hw_divider_pause();
int32_t rc = sio_hw->div_remainder;
uint32_t rc = sio_hw->div_remainder;
sio_hw->div_quotient; // must read quotient to cooperate with other SDK code
return rc;
}
@ -351,7 +351,7 @@ static inline uint32_t hw_divider_u32_remainder_inlined(uint32_t a, uint32_t b)
static inline int32_t hw_divider_s32_quotient_inlined(int32_t a, int32_t b) {
hw_divider_divmod_s32_start(a, b);
hw_divider_pause();
return sio_hw->div_quotient;
return (int32_t)sio_hw->div_quotient;
}
/*! \brief Do a hardware signed HW divide, wait for result, return remainder
@ -366,7 +366,7 @@ static inline int32_t hw_divider_s32_quotient_inlined(int32_t a, int32_t b) {
static inline int32_t hw_divider_s32_remainder_inlined(int32_t a, int32_t b) {
hw_divider_divmod_s32_start(a, b);
hw_divider_pause();
int32_t rc = sio_hw->div_remainder;
int32_t rc = (int32_t)sio_hw->div_remainder;
sio_hw->div_quotient; // must read quotient to cooperate with other SDK code
return rc;
}

2
src/rp2_common/hardware_dma/include/hardware/dma.h
View File

@ -186,7 +186,7 @@ static inline void channel_config_set_chain_to(dma_channel_config *c, uint chain
*/
static inline void channel_config_set_transfer_data_size(dma_channel_config *c, enum dma_channel_transfer_size size) {
assert(size == DMA_SIZE_8 || size == DMA_SIZE_16 || size == DMA_SIZE_32);
c->ctrl = (c->ctrl & ~DMA_CH0_CTRL_TRIG_DATA_SIZE_BITS) | (size << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB);
c->ctrl = (c->ctrl & ~DMA_CH0_CTRL_TRIG_DATA_SIZE_BITS) | (((uint)size) << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB);
}
/*! \brief Set address wrapping parameters

2
src/rp2_common/hardware_flash/flash.c
View File

@ -149,7 +149,7 @@ static void __no_inline_not_in_flash_func(flash_do_cmd)(const uint8_t *txbuf, ui
--tx_remaining;
}
if (can_get && rx_remaining) {
*rxbuf++ = ssi_hw->dr0;
*rxbuf++ = (uint8_t)ssi_hw->dr0;
--rx_remaining;
}
}

2
src/rp2_common/hardware_gpio/gpio.c
View File

@ -50,7 +50,7 @@ void gpio_set_pulls(uint gpio, bool up, bool down) {
invalid_params_if(GPIO, gpio >= NUM_BANK0_GPIOS);
hw_write_masked(
&padsbank0_hw->io[gpio],
(!!up << PADS_BANK0_GPIO0_PUE_LSB) | (!!down << PADS_BANK0_GPIO0_PDE_LSB),
(bool_to_bit(up) << PADS_BANK0_GPIO0_PUE_LSB) | (bool_to_bit(down) << PADS_BANK0_GPIO0_PDE_LSB),
PADS_BANK0_GPIO0_PUE_BITS | PADS_BANK0_GPIO0_PDE_BITS
);
}

27
src/rp2_common/hardware_i2c/i2c.c
View File

@ -115,6 +115,7 @@ static int i2c_write_blocking_internal(i2c_inst_t *i2c, uint8_t addr, const uint
// Synopsys hw accepts start/stop flags alongside data items in the same
// FIFO word, so no 0 byte transfers.
invalid_params_if(I2C, len == 0);
invalid_params_if(I2C, ((int)len) < 0);
i2c->hw->enable = 0;
i2c->hw->tar = addr;
@ -124,15 +125,16 @@ static int i2c_write_blocking_internal(i2c_inst_t *i2c, uint8_t addr, const uint
bool timeout = false;
uint32_t abort_reason;
size_t byte_ctr;
int byte_ctr;
for (byte_ctr = 0; byte_ctr < len; ++byte_ctr) {
int ilen = (int)len;
for (byte_ctr = 0; byte_ctr < ilen; ++byte_ctr) {
bool first = byte_ctr == 0;
bool last = byte_ctr == len - 1;
bool last = byte_ctr == ilen - 1;
i2c->hw->data_cmd =
!!(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
!!(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
bool_to_bit(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
bool_to_bit(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
*src++;
do {
@ -203,6 +205,7 @@ static int i2c_read_blocking_internal(i2c_inst_t *i2c, uint8_t addr, uint8_t *ds
invalid_params_if(I2C, addr >= 0x80); // 7-bit addresses
invalid_params_if(I2C, i2c_reserved_addr(addr));
invalid_params_if(I2C, len == 0);
invalid_params_if(I2C, ((int)len) < 0);
i2c->hw->enable = 0;
i2c->hw->tar = addr;
@ -211,17 +214,17 @@ static int i2c_read_blocking_internal(i2c_inst_t *i2c, uint8_t addr, uint8_t *ds
bool abort = false;
bool timeout = false;
uint32_t abort_reason;
size_t byte_ctr;
for (byte_ctr = 0; byte_ctr < len; ++byte_ctr) {
int byte_ctr;
int ilen = (int)len;
for (byte_ctr = 0; byte_ctr < ilen; ++byte_ctr) {
bool first = byte_ctr == 0;
bool last = byte_ctr == len - 1;
bool last = byte_ctr == ilen - 1;
while (!i2c_get_write_available(i2c))
tight_loop_contents();
i2c->hw->data_cmd =
!!(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
!!(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
bool_to_bit(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
bool_to_bit(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
I2C_IC_DATA_CMD_CMD_BITS; // -> 1 for read
do {
@ -236,7 +239,7 @@ static int i2c_read_blocking_internal(i2c_inst_t *i2c, uint8_t addr, uint8_t *ds
if (abort)
break;
*dst++ = i2c->hw->data_cmd;
*dst++ = (uint8_t) i2c->hw->data_cmd;
}
int rval;

2
src/rp2_common/hardware_i2c/include/hardware/i2c.h
View File

@ -293,7 +293,7 @@ static inline void i2c_read_raw_blocking(i2c_inst_t *i2c, uint8_t *dst, size_t l
for (size_t i = 0; i < len; ++i) {
while (!i2c_get_read_available(i2c))
tight_loop_contents();
*dst++ = i2c_get_hw(i2c)->data_cmd;
*dst++ = (uint8_t)i2c_get_hw(i2c)->data_cmd;
}
}

26
src/rp2_common/hardware_irq/irq.c
View File

@ -24,7 +24,7 @@ static inline void *add_thumb_bit(void *addr) {
}
static inline void *remove_thumb_bit(void *addr) {
return (void *) (((uintptr_t) addr) & ~0x1);
return (void *) (((uintptr_t) addr) & (uint)~0x1);
}
static void set_raw_irq_handler_and_unlock(uint num, irq_handler_t handler, uint32_t save) {
@ -139,7 +139,7 @@ static uint16_t make_branch(uint16_t *from, void *to) {
uint32_t ui_to = (uint32_t)to;
uint32_t delta = (ui_to - ui_from - 4) / 2;
assert(!(delta >> 11u));
return 0xe000 | (delta & 0x7ff);
return (uint16_t)(0xe000 | (delta & 0x7ff));
}
static void insert_branch_and_link(uint16_t *from, void *to) {
@ -147,8 +147,8 @@ static void insert_branch_and_link(uint16_t *from, void *to) {
uint32_t ui_to = (uint32_t)to;
uint32_t delta = (ui_to - ui_from - 4) / 2;
assert(!(delta >> 11u));
from[0] = 0xf000 | ((delta >> 11u) & 0x7ffu);
from[1] = 0xf800 | (delta & 0x7ffu);
from[0] = (uint16_t)(0xf000 | ((delta >> 11u) & 0x7ffu));
from[1] = (uint16_t)(0xf800 | (delta & 0x7ffu));
}
static inline void *resolve_branch(uint16_t *inst) {
@ -174,7 +174,11 @@ static inline int8_t slot_diff(struct irq_handler_chain_slot *to, struct irq_han
: "l" (from)
:
);
return result;
return (int8_t)result;
}
static inline int8_t get_slot_index(struct irq_handler_chain_slot *slot) {
return slot_diff(slot, irq_handler_chain_slots);
}
void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_priority) {
@ -189,7 +193,7 @@ void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_prior
uint32_t save = spin_lock_blocking(lock);
hard_assert(irq_hander_chain_free_slot_head >= 0);
struct irq_handler_chain_slot *slot = &irq_handler_chain_slots[irq_hander_chain_free_slot_head];
int slot_index = irq_hander_chain_free_slot_head;
int8_t slot_index = irq_hander_chain_free_slot_head;
irq_hander_chain_free_slot_head = slot->link;
irq_handler_t vtable_handler = get_vtable()[16 + num];
if (!is_shared_irq_raw_handler(vtable_handler)) {
@ -237,7 +241,7 @@ void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_prior
.inst1 = 0xa100, // add r1, pc, #0
.inst2 = make_branch(&slot->inst2, irq_handler_chain_first_slot), // b irq_handler_chain_first_slot
.inst3 = make_branch(&slot->inst3, existing_vtable_slot), // b existing_slot
.link = slot_diff(existing_vtable_slot, irq_handler_chain_slots),
.link = get_slot_index(existing_vtable_slot),
.priority = order_priority,
.handler = handler
};
@ -286,14 +290,14 @@ void irq_remove_handler(uint num, irq_handler_t handler) {
struct irq_handler_chain_slot *prev_slot = NULL;
struct irq_handler_chain_slot *existing_vtable_slot = remove_thumb_bit(vtable_handler);
struct irq_handler_chain_slot *to_free_slot = existing_vtable_slot;
int to_free_slot_index = to_free_slot - irq_handler_chain_slots;
int8_t to_free_slot_index = get_slot_index(to_free_slot);
while (to_free_slot->handler != handler) {
prev_slot = to_free_slot;
if (to_free_slot->link < 0) break;
to_free_slot = &irq_handler_chain_slots[to_free_slot->link];
}
if (to_free_slot->handler == handler) {
int next_slot_index = to_free_slot->link;
int8_t next_slot_index = to_free_slot->link;
if (next_slot_index >= 0) {
// There is another slot in the chain, so copy that over us, so that our inst3 points at something valid
// Note this only matters in the exception case anyway, and it that case, we will skip the next handler,
@ -365,11 +369,11 @@ void irq_add_tail_to_free_list(struct irq_handler_chain_slot *slot) {
irq_handler_t slot_handler = (irq_handler_t) add_thumb_bit(slot);
assert(is_shared_irq_raw_handler(slot_handler));
int exception = __get_current_exception();
uint exception = __get_current_exception();
assert(exception);
spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_IRQ);
uint32_t save = spin_lock_blocking(lock);
int slot_index = slot - irq_handler_chain_slots;
int8_t slot_index = get_slot_index(slot);
if (slot_handler == get_vtable()[exception]) {
get_vtable()[exception] = __unhandled_user_irq;
} else {

46
src/rp2_common/hardware_pio/include/hardware/pio.h
View File

@ -185,8 +185,8 @@ static inline void sm_config_set_sideset(pio_sm_config *c, uint bit_count, bool
(bit_count << PIO_SM0_PINCTRL_SIDESET_COUNT_LSB);
c->execctrl = (c->execctrl & ~(PIO_SM0_EXECCTRL_SIDE_EN_BITS | PIO_SM0_EXECCTRL_SIDE_PINDIR_BITS)) |
(!!optional << PIO_SM0_EXECCTRL_SIDE_EN_LSB) |
(!!pindirs << PIO_SM0_EXECCTRL_SIDE_PINDIR_LSB);
(bool_to_bit(optional) << PIO_SM0_EXECCTRL_SIDE_EN_LSB) |
(bool_to_bit(pindirs) << PIO_SM0_EXECCTRL_SIDE_PINDIR_LSB);
}
/*! \brief Set the state machine clock divider (from a floating point value) in a state machine configuration
@ -205,8 +205,8 @@ static inline void sm_config_set_sideset(pio_sm_config *c, uint bit_count, bool
* although it will depend on the use case.
*/
static inline void sm_config_set_clkdiv(pio_sm_config *c, float div) {
uint16_t div_int = (uint16_t) div;
uint8_t div_frac = (uint8_t) ((div - div_int) * (1u << 8u));
uint div_int = (uint)div;
uint div_frac = (uint)((div - (float)div_int) * (1u << 8u));
c->clkdiv =
(div_frac << PIO_SM0_CLKDIV_FRAC_LSB) |
(div_int << PIO_SM0_CLKDIV_INT_LSB);
@ -227,8 +227,8 @@ static inline void sm_config_set_clkdiv(pio_sm_config *c, float div) {
*/
static inline void sm_config_set_clkdiv_int_frac(pio_sm_config *c, uint16_t div_int, uint8_t div_frac) {
c->clkdiv =
(div_frac << PIO_SM0_CLKDIV_FRAC_LSB) |
(div_int << PIO_SM0_CLKDIV_INT_LSB);
(((uint)div_frac) << PIO_SM0_CLKDIV_FRAC_LSB) |
(((uint)div_int) << PIO_SM0_CLKDIV_INT_LSB);
}
/*! \brief Set the wrap addresses in a state machine configuration
@ -273,8 +273,8 @@ static inline void sm_config_set_in_shift(pio_sm_config *c, bool shift_right, bo
~(PIO_SM0_SHIFTCTRL_IN_SHIFTDIR_BITS |
PIO_SM0_SHIFTCTRL_AUTOPUSH_BITS |
PIO_SM0_SHIFTCTRL_PUSH_THRESH_BITS)) |
(!!shift_right << PIO_SM0_SHIFTCTRL_IN_SHIFTDIR_LSB) |
(!!autopush << PIO_SM0_SHIFTCTRL_AUTOPUSH_LSB) |
(bool_to_bit(shift_right) << PIO_SM0_SHIFTCTRL_IN_SHIFTDIR_LSB) |
(bool_to_bit(autopush) << PIO_SM0_SHIFTCTRL_AUTOPUSH_LSB) |
((push_threshold & 0x1fu) << PIO_SM0_SHIFTCTRL_PUSH_THRESH_LSB);
}
@ -292,8 +292,8 @@ static inline void sm_config_set_out_shift(pio_sm_config *c, bool shift_right, b
~(PIO_SM0_SHIFTCTRL_OUT_SHIFTDIR_BITS |
PIO_SM0_SHIFTCTRL_AUTOPULL_BITS |
PIO_SM0_SHIFTCTRL_PULL_THRESH_BITS)) |
(!!shift_right << PIO_SM0_SHIFTCTRL_OUT_SHIFTDIR_LSB) |
(!!autopull << PIO_SM0_SHIFTCTRL_AUTOPULL_LSB) |
(bool_to_bit(shift_right) << PIO_SM0_SHIFTCTRL_OUT_SHIFTDIR_LSB) |
(bool_to_bit(autopull) << PIO_SM0_SHIFTCTRL_AUTOPULL_LSB) |
((pull_threshold & 0x1fu) << PIO_SM0_SHIFTCTRL_PULL_THRESH_LSB);
}
@ -305,8 +305,8 @@ static inline void sm_config_set_out_shift(pio_sm_config *c, bool shift_right, b
*/
static inline void sm_config_set_fifo_join(pio_sm_config *c, enum pio_fifo_join join) {
assert(join >= 0 && join <= 2);
c->shiftctrl = (c->shiftctrl & ~(PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS | PIO_SM0_SHIFTCTRL_FJOIN_RX_BITS)) |
(join << PIO_SM0_SHIFTCTRL_FJOIN_TX_LSB);
c->shiftctrl = (c->shiftctrl & (uint)~(PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS | PIO_SM0_SHIFTCTRL_FJOIN_RX_BITS)) |
(((uint)join) << PIO_SM0_SHIFTCTRL_FJOIN_TX_LSB);
}
/*! \brief Set special 'out' operations in a state machine configuration
@ -317,12 +317,12 @@ static inline void sm_config_set_fifo_join(pio_sm_config *c, enum pio_fifo_join
* \param has_enable_pin true to enable auxiliary OUT enable pin
* \param enable_pin_index pin index for auxiliary OUT enable
*/
static inline void sm_config_set_out_special(pio_sm_config *c, bool sticky, bool has_enable_pin, int enable_pin_index) {
static inline void sm_config_set_out_special(pio_sm_config *c, bool sticky, bool has_enable_pin, uint enable_pin_index) {
c->execctrl = (c->execctrl &
~(PIO_SM0_EXECCTRL_OUT_STICKY_BITS | PIO_SM0_EXECCTRL_INLINE_OUT_EN_BITS |
(uint)~(PIO_SM0_EXECCTRL_OUT_STICKY_BITS | PIO_SM0_EXECCTRL_INLINE_OUT_EN_BITS |
PIO_SM0_EXECCTRL_OUT_EN_SEL_BITS)) |
(!!sticky << PIO_SM0_EXECCTRL_OUT_STICKY_LSB) |
(!!has_enable_pin << PIO_SM0_EXECCTRL_INLINE_OUT_EN_LSB) |
(bool_to_bit(sticky) << PIO_SM0_EXECCTRL_OUT_STICKY_LSB) |
(bool_to_bit(has_enable_pin) << PIO_SM0_EXECCTRL_INLINE_OUT_EN_LSB) |
((enable_pin_index << PIO_SM0_EXECCTRL_OUT_EN_SEL_LSB) & PIO_SM0_EXECCTRL_OUT_EN_SEL_BITS);
}
@ -336,7 +336,7 @@ static inline void sm_config_set_out_special(pio_sm_config *c, bool sticky, bool
static inline void sm_config_set_mov_status(pio_sm_config *c, enum pio_mov_status_type status_sel, uint status_n) {
c->execctrl = (c->execctrl
& ~(PIO_SM0_EXECCTRL_STATUS_SEL_BITS | PIO_SM0_EXECCTRL_STATUS_N_BITS))
| ((status_sel << PIO_SM0_EXECCTRL_STATUS_SEL_LSB) & PIO_SM0_EXECCTRL_STATUS_SEL_BITS)
| ((((uint)status_sel) << PIO_SM0_EXECCTRL_STATUS_SEL_LSB) & PIO_SM0_EXECCTRL_STATUS_SEL_BITS)
| ((status_n << PIO_SM0_EXECCTRL_STATUS_N_LSB) & PIO_SM0_EXECCTRL_STATUS_N_BITS);
}
@ -515,7 +515,7 @@ void pio_sm_init(PIO pio, uint sm, uint initial_pc, const pio_sm_config *config)
* \param enabled true to enable the state machine; false to disable
*/
static inline void pio_sm_set_enabled(PIO pio, uint sm, bool enabled) {
pio->ctrl = (pio->ctrl & ~(1u << sm)) | (!!enabled << sm);
pio->ctrl = (pio->ctrl & ~(1u << sm)) | (bool_to_bit(enabled) << sm);
}
/*! \brief Enable or disable multiple PIO state machines
@ -853,7 +853,7 @@ static inline bool pio_sm_is_rx_fifo_empty(PIO pio, uint sm) {
*/
static inline uint pio_sm_get_rx_fifo_level(PIO pio, uint sm) {
check_sm_param(sm);
int bitoffs = PIO_FLEVEL_RX0_LSB + sm * (PIO_FLEVEL_RX1_LSB - PIO_FLEVEL_RX0_LSB);
uint bitoffs = PIO_FLEVEL_RX0_LSB + sm * (PIO_FLEVEL_RX1_LSB - PIO_FLEVEL_RX0_LSB);
const uint32_t mask = PIO_FLEVEL_RX0_BITS >> PIO_FLEVEL_RX0_LSB;
return (pio->flevel >> bitoffs) & mask;
}
@ -945,8 +945,8 @@ void pio_sm_drain_tx_fifo(PIO pio, uint sm);
*/
static inline void pio_sm_set_clkdiv(PIO pio, uint sm, float div) {
check_sm_param(sm);
uint16_t div_int = (uint16_t) div;
uint8_t div_frac = (uint8_t) ((div - div_int) * (1u << 8u));
uint div_int = (uint16_t) div;
uint div_frac = (uint8_t) ((div - (float)div_int) * (1u << 8u));
pio->sm[sm].clkdiv =
(div_frac << PIO_SM0_CLKDIV_FRAC_LSB) |
(div_int << PIO_SM0_CLKDIV_INT_LSB);
@ -963,8 +963,8 @@ static inline void pio_sm_set_clkdiv(PIO pio, uint sm, float div) {
static inline void pio_sm_set_clkdiv_int_frac(PIO pio, uint sm, uint16_t div_int, uint8_t div_frac) {
check_sm_param(sm);
pio->sm[sm].clkdiv =
(div_frac << PIO_SM0_CLKDIV_FRAC_LSB) |
(div_int << PIO_SM0_CLKDIV_INT_LSB);
(((uint)div_frac) << PIO_SM0_CLKDIV_FRAC_LSB) |
(((uint)div_int) << PIO_SM0_CLKDIV_INT_LSB);
}
/*! \brief Clear a state machine's TX and RX FIFOs

14
src/rp2_common/hardware_pio/pio.c
View File

@ -43,11 +43,11 @@ void pio_sm_unclaim(PIO pio, uint sm) {
int pio_claim_unused_sm(PIO pio, bool required) {
// PIO index is 0 or 1.
int which = (int)pio_get_index(pio);
int base = which * NUM_PIO_STATE_MACHINES;
uint which = pio_get_index(pio);
uint base = which * NUM_PIO_STATE_MACHINES;
int index = hw_claim_unused_from_range((uint8_t*)&claimed, required, base,
base + NUM_PIO_STATE_MACHINES - 1, "No PIO state machines are available");
return index >= base ? index - base : -1;
return index >= (int)base ? index - (int)base : -1;
}
static_assert(PIO_INSTRUCTION_COUNT <= 32, "");
@ -113,9 +113,9 @@ uint pio_add_program(PIO pio, const pio_program_t *program) {
if (offset < 0) {
panic("No program space");
}
_pio_add_program_at_offset(pio, program, offset);
_pio_add_program_at_offset(pio, program, (uint)offset);
hw_claim_unlock(save);
return offset;
return (uint)offset;
}
void pio_add_program_at_offset(PIO pio, const pio_program_t *program, uint offset) {
@ -166,7 +166,7 @@ void pio_sm_set_pins(PIO pio, uint sm, uint32_t pins) {
void pio_sm_set_pins_with_mask(PIO pio, uint sm, uint32_t pinvals, uint32_t pin_mask) {
uint32_t pinctrl_saved = pio->sm[sm].pinctrl;
while (pin_mask) {
uint base = __builtin_ctz(pin_mask);
uint base = (uint)__builtin_ctz(pin_mask);
pio->sm[sm].pinctrl =
(1u << PIO_SM0_PINCTRL_SET_COUNT_LSB) |
(base << PIO_SM0_PINCTRL_SET_BASE_LSB);
@ -179,7 +179,7 @@ void pio_sm_set_pins_with_mask(PIO pio, uint sm, uint32_t pinvals, uint32_t pin_
void pio_sm_set_pindirs_with_mask(PIO pio, uint sm, uint32_t pindirs, uint32_t pin_mask) {
uint32_t pinctrl_saved = pio->sm[sm].pinctrl;
while (pin_mask) {
uint base = __builtin_ctz(pin_mask);
uint base = (uint)__builtin_ctz(pin_mask);
pio->sm[sm].pinctrl =
(1u << PIO_SM0_PINCTRL_SET_COUNT_LSB) |
(base << PIO_SM0_PINCTRL_SET_BASE_LSB);

2
src/rp2_common/hardware_pll/include/hardware/pll.h
View File

@ -39,7 +39,7 @@ typedef pll_hw_t *PLL;
* \param post_div1 Post Divider 1 - range 1-7. Must be >= post_div2
* \param post_div2 Post Divider 2 - range 1-7
*/
void pll_init(PLL pll, uint32_t ref_div, uint32_t vco_freq, uint32_t post_div1, uint8_t post_div2);
void pll_init(PLL pll, uint ref_div, uint vco_freq, uint post_div1, uint post_div2);
/*! \brief Release/uninitialise specified PLL.
* \ingroup hardware_pll

2
src/rp2_common/hardware_pll/pll.c
View File

@ -9,7 +9,7 @@
#include "hardware/pll.h"
/// \tag::pll_init_calculations[]
void pll_init(PLL pll, uint32_t refdiv, uint32_t vco_freq, uint32_t post_div1, uint8_t post_div2) {
void pll_init(PLL pll, uint refdiv, uint vco_freq, uint post_div1, uint post_div2) {
// Turn off PLL in case it is already running
pll->pwr = 0xffffffff;
pll->fbdiv_int = 0;

26
src/rp2_common/hardware_pwm/include/hardware/pwm.h
View File

@ -102,7 +102,7 @@ static inline uint pwm_gpio_to_channel(uint gpio) {
*/
static inline void pwm_config_set_phase_correct(pwm_config *c, bool phase_correct) {
c->csr = (c->csr & ~PWM_CH0_CSR_PH_CORRECT_BITS)
| (!!phase_correct << PWM_CH0_CSR_PH_CORRECT_LSB);
| (bool_to_bit(phase_correct) << PWM_CH0_CSR_PH_CORRECT_LSB);
}
/** \brief Set clock divider in a PWM configuration
@ -146,7 +146,7 @@ static inline void pwm_config_set_clkdiv_int(pwm_config *c, uint div) {
static inline void pwm_config_set_clkdiv_mode(pwm_config *c, enum pwm_clkdiv_mode mode) {
valid_params_if(PWM, mode >= PWM_DIV_FREE_RUNNING && mode <= PWM_DIV_B_FALLING);
c->csr = (c->csr & ~PWM_CH0_CSR_DIVMODE_BITS)
| (mode << PWM_CH0_CSR_DIVMODE_LSB);
| (((uint)mode) << PWM_CH0_CSR_DIVMODE_LSB);
}
/** \brief Set output polarity in a PWM configuration
@ -158,7 +158,7 @@ static inline void pwm_config_set_clkdiv_mode(pwm_config *c, enum pwm_clkdiv_mod
*/
static inline void pwm_config_set_output_polarity(pwm_config *c, bool a, bool b) {
c->csr = (c->csr & ~(PWM_CH0_CSR_A_INV_BITS | PWM_CH0_CSR_B_INV_BITS))
| ((!!a << PWM_CH0_CSR_A_INV_LSB) | (!!b << PWM_CH0_CSR_B_INV_LSB));
| ((bool_to_bit(a) << PWM_CH0_CSR_A_INV_LSB) | (bool_to_bit(b) << PWM_CH0_CSR_B_INV_LSB));
}
/** \brief Set PWM counter wrap value in a PWM configuration
@ -192,7 +192,7 @@ static inline void pwm_init(uint slice_num, pwm_config *c, bool start) {
pwm_hw->slice[slice_num].cc = PWM_CH0_CC_RESET;
pwm_hw->slice[slice_num].top = c->top;
pwm_hw->slice[slice_num].div = c->div;
pwm_hw->slice[slice_num].csr = c->csr | (!!start << PWM_CH0_CSR_EN_LSB);
pwm_hw->slice[slice_num].csr = c->csr | (bool_to_bit(start) << PWM_CH0_CSR_EN_LSB);
}
/** \brief Get a set of default values for PWM configuration
@ -252,7 +252,7 @@ static inline void pwm_set_chan_level(uint slice_num, uint chan, uint16_t level)
check_slice_num_param(slice_num);
hw_write_masked(
&pwm_hw->slice[slice_num].cc,
level << (chan ? PWM_CH0_CC_B_LSB : PWM_CH0_CC_A_LSB),
((uint)level) << (chan ? PWM_CH0_CC_B_LSB : PWM_CH0_CC_A_LSB),
chan ? PWM_CH0_CC_B_BITS : PWM_CH0_CC_A_BITS
);
}
@ -274,7 +274,7 @@ static inline void pwm_set_chan_level(uint slice_num, uint chan, uint16_t level)
*/
static inline void pwm_set_both_levels(uint slice_num, uint16_t level_a, uint16_t level_b) {
check_slice_num_param(slice_num);
pwm_hw->slice[slice_num].cc = (level_b << PWM_CH0_CC_B_LSB) | (level_a << PWM_CH0_CC_A_LSB);
pwm_hw->slice[slice_num].cc = (((uint)level_b) << PWM_CH0_CC_B_LSB) | (((uint)level_a) << PWM_CH0_CC_A_LSB);
}
/** \brief Helper function to set the PWM level for the slice and channel associated with a GPIO.
@ -310,7 +310,7 @@ static inline void pwm_set_gpio_level(uint gpio, uint16_t level) {
*/
static inline uint16_t pwm_get_counter(uint slice_num) {
check_slice_num_param(slice_num);
return (pwm_hw->slice[slice_num].ctr);
return (uint16_t)(pwm_hw->slice[slice_num].ctr);
}
/** \brief Set PWM counter
@ -373,7 +373,7 @@ static inline void pwm_retard_count(uint slice_num) {
static inline void pwm_set_clkdiv_int_frac(uint slice_num, uint8_t integer, uint8_t fract) {
check_slice_num_param(slice_num);
valid_params_if(PWM, fract < 16);
pwm_hw->slice[slice_num].div = (integer << PWM_CH0_DIV_INT_LSB) | (fract << PWM_CH0_DIV_FRAC_LSB);
pwm_hw->slice[slice_num].div = (((uint)integer) << PWM_CH0_DIV_INT_LSB) | (((uint)fract) << PWM_CH0_DIV_FRAC_LSB);
}
/** \brief Set PWM clock divider
@ -401,7 +401,7 @@ static inline void pwm_set_clkdiv(uint slice_num, float divider) {
*/
static inline void pwm_set_output_polarity(uint slice_num, bool a, bool b) {
check_slice_num_param(slice_num);
hw_write_masked(&pwm_hw->slice[slice_num].csr, !!a << PWM_CH0_CSR_A_INV_LSB | !!b << PWM_CH0_CSR_B_INV_LSB,
hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(a) << PWM_CH0_CSR_A_INV_LSB | bool_to_bit(b) << PWM_CH0_CSR_B_INV_LSB,
PWM_CH0_CSR_A_INV_BITS | PWM_CH0_CSR_B_INV_BITS);
}
@ -415,7 +415,7 @@ static inline void pwm_set_output_polarity(uint slice_num, bool a, bool b) {
static inline void pwm_set_clkdiv_mode(uint slice_num, enum pwm_clkdiv_mode mode) {
check_slice_num_param(slice_num);
valid_params_if(PWM, mode >= PWM_DIV_FREE_RUNNING && mode <= PWM_DIV_B_FALLING);
hw_write_masked(&pwm_hw->slice[slice_num].csr, mode << PWM_CH0_CSR_DIVMODE_LSB, PWM_CH0_CSR_DIVMODE_BITS);
hw_write_masked(&pwm_hw->slice[slice_num].csr, ((uint)mode) << PWM_CH0_CSR_DIVMODE_LSB, PWM_CH0_CSR_DIVMODE_BITS);
}
/** \brief Set PWM phase correct on/off
@ -429,7 +429,7 @@ static inline void pwm_set_clkdiv_mode(uint slice_num, enum pwm_clkdiv_mode mode
*/
static inline void pwm_set_phase_correct(uint slice_num, bool phase_correct) {
check_slice_num_param(slice_num);
hw_write_masked(&pwm_hw->slice[slice_num].csr, phase_correct << PWM_CH0_CSR_PH_CORRECT_LSB, PWM_CH0_CSR_PH_CORRECT_BITS);
hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(phase_correct) << PWM_CH0_CSR_PH_CORRECT_LSB, PWM_CH0_CSR_PH_CORRECT_BITS);
}
/** \brief Enable/Disable PWM
@ -440,7 +440,7 @@ static inline void pwm_set_phase_correct(uint slice_num, bool phase_correct) {
*/
static inline void pwm_set_enabled(uint slice_num, bool enabled) {
check_slice_num_param(slice_num);
hw_write_masked(&pwm_hw->slice[slice_num].csr, !!enabled << PWM_CH0_CSR_EN_LSB, PWM_CH0_CSR_EN_BITS);
hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(enabled) << PWM_CH0_CSR_EN_LSB, PWM_CH0_CSR_EN_BITS);
}
/** \brief Enable/Disable multiple PWM slices simultaneously
@ -500,7 +500,7 @@ static inline void pwm_clear_irq(uint slice_num) {
*
* \return Bitmask of all PWM interrupts currently set
*/
static inline int32_t pwm_get_irq_status_mask(void) {
static inline uint32_t pwm_get_irq_status_mask(void) {
return pwm_hw->ints;
}

56
src/rp2_common/hardware_rtc/rtc.c
View File

@ -65,13 +65,13 @@ bool rtc_set_datetime(datetime_t *t) {
}
// Write to setup registers
rtc_hw->setup_0 = (t->year << RTC_SETUP_0_YEAR_LSB ) |
(t->month << RTC_SETUP_0_MONTH_LSB) |
(t->day << RTC_SETUP_0_DAY_LSB);
rtc_hw->setup_1 = (t->dotw << RTC_SETUP_1_DOTW_LSB) |
(t->hour << RTC_SETUP_1_HOUR_LSB) |
(t->min << RTC_SETUP_1_MIN_LSB) |
(t->sec << RTC_SETUP_1_SEC_LSB);
rtc_hw->setup_0 = (((uint)t->year) << RTC_SETUP_0_YEAR_LSB ) |
(((uint)t->month) << RTC_SETUP_0_MONTH_LSB) |
(((uint)t->day) << RTC_SETUP_0_DAY_LSB);
rtc_hw->setup_1 = (((uint)t->dotw) << RTC_SETUP_1_DOTW_LSB) |
(((uint)t->hour) << RTC_SETUP_1_HOUR_LSB) |
(((uint)t->min) << RTC_SETUP_1_MIN_LSB) |
(((uint)t->sec) << RTC_SETUP_1_SEC_LSB);
// Load setup values into rtc clock domain
rtc_hw->ctrl = RTC_CTRL_LOAD_BITS;
@ -131,13 +131,13 @@ static void rtc_irq_handler(void) {
static bool rtc_alarm_repeats(datetime_t *t) {
// If any value is set to -1 then we don't match on that value
// hence the alarm will eventually repeat
if (t->year == -1) return true;
if (t->month == -1) return true;
if (t->day == -1) return true;
if (t->dotw == -1) return true;
if (t->hour == -1) return true;
if (t->min == -1) return true;
if (t->sec == -1) return true;
if (t->year < 0) return true;
if (t->month < 0) return true;
if (t->day < 0) return true;
if (t->dotw < 0) return true;
if (t->hour < 0) return true;
if (t->min < 0) return true;
if (t->sec < 0) return true;
return false;
}
@ -145,22 +145,22 @@ void rtc_set_alarm(datetime_t *t, rtc_callback_t user_callback) {
rtc_disable_alarm();
// Only add to setup if it isn't -1
rtc_hw->irq_setup_0 = ((t->year == -1) ? 0 : (t->year << RTC_IRQ_SETUP_0_YEAR_LSB )) |
((t->month == -1) ? 0 : (t->month << RTC_IRQ_SETUP_0_MONTH_LSB)) |
((t->day == -1) ? 0 : (t->day << RTC_IRQ_SETUP_0_DAY_LSB ));
rtc_hw->irq_setup_1 = ((t->dotw == -1) ? 0 : (t->dotw << RTC_IRQ_SETUP_1_DOTW_LSB)) |
((t->hour == -1) ? 0 : (t->hour << RTC_IRQ_SETUP_1_HOUR_LSB)) |
((t->min == -1) ? 0 : (t->min << RTC_IRQ_SETUP_1_MIN_LSB )) |
((t->sec == -1) ? 0 : (t->sec << RTC_IRQ_SETUP_1_SEC_LSB ));
rtc_hw->irq_setup_0 = ((t->year < 0) ? 0 : (((uint)t->year) << RTC_IRQ_SETUP_0_YEAR_LSB )) |
((t->month < 0) ? 0 : (((uint)t->month) << RTC_IRQ_SETUP_0_MONTH_LSB)) |
((t->day < 0) ? 0 : (((uint)t->day) << RTC_IRQ_SETUP_0_DAY_LSB ));
rtc_hw->irq_setup_1 = ((t->dotw < 0) ? 0 : (((uint)t->dotw) << RTC_IRQ_SETUP_1_DOTW_LSB)) |
((t->hour < 0) ? 0 : (((uint)t->hour) << RTC_IRQ_SETUP_1_HOUR_LSB)) |
((t->min < 0) ? 0 : (((uint)t->min) << RTC_IRQ_SETUP_1_MIN_LSB )) |
((t->sec < 0) ? 0 : (((uint)t->sec) << RTC_IRQ_SETUP_1_SEC_LSB ));
// Set the match enable bits for things we care about
if (t->year != -1) hw_set_bits(&rtc_hw->irq_setup_0, RTC_IRQ_SETUP_0_YEAR_ENA_BITS);
if (t->month != -1) hw_set_bits(&rtc_hw->irq_setup_0, RTC_IRQ_SETUP_0_MONTH_ENA_BITS);
if (t->day != -1) hw_set_bits(&rtc_hw->irq_setup_0, RTC_IRQ_SETUP_0_DAY_ENA_BITS);
if (t->dotw != -1) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_DOTW_ENA_BITS);
if (t->hour != -1) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_HOUR_ENA_BITS);
if (t->min != -1) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_MIN_ENA_BITS);
if (t->sec != -1) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_SEC_ENA_BITS);
if (t->year >= 0) hw_set_bits(&rtc_hw->irq_setup_0, RTC_IRQ_SETUP_0_YEAR_ENA_BITS);
if (t->month >= 0) hw_set_bits(&rtc_hw->irq_setup_0, RTC_IRQ_SETUP_0_MONTH_ENA_BITS);
if (t->day >= 0) hw_set_bits(&rtc_hw->irq_setup_0, RTC_IRQ_SETUP_0_DAY_ENA_BITS);
if (t->dotw >= 0) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_DOTW_ENA_BITS);
if (t->hour >= 0) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_HOUR_ENA_BITS);
if (t->min >= 0) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_MIN_ENA_BITS);
if (t->sec >= 0) hw_set_bits(&rtc_hw->irq_setup_1, RTC_IRQ_SETUP_1_SEC_ENA_BITS);
// Does it repeat? I.e. do we not match on any of the bits
_alarm_repeats = rtc_alarm_repeats(t);

6
src/rp2_common/hardware_spi/include/hardware/spi.h
View File

@ -143,9 +143,9 @@ static inline void spi_set_format(spi_inst_t *spi, uint data_bits, spi_cpol_t cp
invalid_params_if(SPI, cpol != SPI_CPOL_0 && cpol != SPI_CPOL_1);
invalid_params_if(SPI, cpha != SPI_CPHA_0 && cpha != SPI_CPHA_1);
hw_write_masked(&spi_get_hw(spi)->cr0,
(data_bits - 1) << SPI_SSPCR0_DSS_LSB |
cpol << SPI_SSPCR0_SPO_LSB |
cpha << SPI_SSPCR0_SPH_LSB,
((uint)(data_bits - 1)) << SPI_SSPCR0_DSS_LSB |
((uint)cpol) << SPI_SSPCR0_SPO_LSB |
((uint)cpha) << SPI_SSPCR0_SPH_LSB,
SPI_SSPCR0_DSS_BITS |
SPI_SSPCR0_SPO_BITS |
SPI_SSPCR0_SPH_BITS);

19
src/rp2_common/hardware_spi/spi.c
View File

@ -68,6 +68,8 @@ uint spi_set_baudrate(spi_inst_t *spi, uint baudrate) {
// Write len bytes from src to SPI. Simultaneously read len bytes from SPI to dst.
// Note this function is guaranteed to exit in a known amount of time (bits sent * time per bit)
int __not_in_flash_func(spi_write_read_blocking)(spi_inst_t *spi, const uint8_t *src, uint8_t *dst, size_t len) {
invalid_params_if(SPI, 0 > (int)len);
// Never have more transfers in flight than will fit into the RX FIFO,
// else FIFO will overflow if this code is heavily interrupted.
const size_t fifo_depth = 8;
@ -84,11 +86,12 @@ int __not_in_flash_func(spi_write_read_blocking)(spi_inst_t *spi, const uint8_t
}
}
return len;
return (int)len;
}
// Write len bytes directly from src to the SPI, and discard any data received back
int __not_in_flash_func(spi_write_blocking)(spi_inst_t *spi, const uint8_t *src, size_t len) {
invalid_params_if(SPI, 0 > (int)len);
// Write to TX FIFO whilst ignoring RX, then clean up afterward. When RX
// is full, PL022 inhibits RX pushes, and sets a sticky flag on
// push-on-full, but continues shifting. Safe if SSPIMSC_RORIM is not set.
@ -109,7 +112,7 @@ int __not_in_flash_func(spi_write_blocking)(spi_inst_t *spi, const uint8_t *src,
// Don't leave overrun flag set
spi_get_hw(spi)->icr = SPI_SSPICR_RORIC_BITS;
return len;
return (int)len;
}
// Read len bytes directly from the SPI to dst.
@ -117,6 +120,7 @@ int __not_in_flash_func(spi_write_blocking)(spi_inst_t *spi, const uint8_t *src,
// Generally this can be 0, but some devices require a specific value here,
// e.g. SD cards expect 0xff
int __not_in_flash_func(spi_read_blocking)(spi_inst_t *spi, uint8_t repeated_tx_data, uint8_t *dst, size_t len) {
invalid_params_if(SPI, 0 > (int)len);
const size_t fifo_depth = 8;
size_t rx_remaining = len, tx_remaining = len;
@ -131,11 +135,12 @@ int __not_in_flash_func(spi_read_blocking)(spi_inst_t *spi, uint8_t repeated_tx_
}
}
return len;
return (int)len;
}
// Write len halfwords from src to SPI. Simultaneously read len halfwords from SPI to dst.
int __not_in_flash_func(spi_write16_read16_blocking)(spi_inst_t *spi, const uint16_t *src, uint16_t *dst, size_t len) {
invalid_params_if(SPI, 0 > (int)len);
// Never have more transfers in flight than will fit into the RX FIFO,
// else FIFO will overflow if this code is heavily interrupted.
const size_t fifo_depth = 8;
@ -152,11 +157,12 @@ int __not_in_flash_func(spi_write16_read16_blocking)(spi_inst_t *spi, const uint
}
}
return len;
return (int)len;
}
// Write len bytes directly from src to the SPI, and discard any data received back
int __not_in_flash_func(spi_write16_blocking)(spi_inst_t *spi, const uint16_t *src, size_t len) {
invalid_params_if(SPI, 0 > (int)len);
// Deliberately overflow FIFO, then clean up afterward, to minimise amount
// of APB polling required per halfword
for (size_t i = 0; i < len; ++i) {
@ -175,12 +181,13 @@ int __not_in_flash_func(spi_write16_blocking)(spi_inst_t *spi, const uint16_t *s
// Don't leave overrun flag set
spi_get_hw(spi)->icr = SPI_SSPICR_RORIC_BITS;
return len;
return (int)len;
}
// Read len halfwords directly from the SPI to dst.
// repeated_tx_data is output repeatedly on SO as data is read in from SI.
int __not_in_flash_func(spi_read16_blocking)(spi_inst_t *spi, uint16_t repeated_tx_data, uint16_t *dst, size_t len) {
invalid_params_if(SPI, 0 > (int)len);
const size_t fifo_depth = 8;
size_t rx_remaining = len, tx_remaining = len;
@ -195,5 +202,5 @@ int __not_in_flash_func(spi_read16_blocking)(spi_inst_t *spi, uint16_t repeated_
}
}
return len;
return (int)len;
}

14
src/rp2_common/hardware_sync/include/hardware/sync.h
View File

@ -15,7 +15,6 @@
extern "C" {
#endif
/** \file hardware/sync.h
* \defgroup hardware_sync hardware_sync
*
@ -30,6 +29,11 @@ extern "C" {
* functionality may break or not function optimally
*/
// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_SYNC, Enable/disable SYNC assertions, type=bool, default=0, group=hardware_SYNC
#ifndef PARAM_ASSERTIONS_ENABLED_SYNC
#define PARAM_ASSERTIONS_ENABLED_SYNC 0
#endif
/** \brief A spin lock identifier
* \ingroup hardware_sync
*/
@ -205,7 +209,9 @@ inline static spin_lock_t *spin_lock_instance(uint lock_num) {
* \return The Spinlock ID
*/
inline static uint spin_lock_get_num(spin_lock_t *lock) {
return lock - (spin_lock_t *) (SIO_BASE + SIO_SPINLOCK0_OFFSET);
int lock_num = lock - (spin_lock_t *) (SIO_BASE + SIO_SPINLOCK0_OFFSET);
invalid_params_if(SYNC, lock_num < 0 || lock_num >= NUM_SPIN_LOCKS);
return (uint) lock_num;
}
/*! \brief Acquire a spin lock without disabling interrupts (hence unsafe)
@ -250,9 +256,9 @@ inline static uint32_t spin_lock_blocking(spin_lock_t *lock) {
*
* \param lock Spinlock instance
*/
inline static bool is_spin_locked(const spin_lock_t *lock) {
inline static bool is_spin_locked(spin_lock_t *lock) {
check_hw_size(spin_lock_t, 4);
uint32_t lock_num = lock - spin_lock_instance(0);
uint lock_num = spin_lock_get_num(lock);
return 0 != (*(io_ro_32 *) (SIO_BASE + SIO_SPINLOCK_ST_OFFSET) & (1u << lock_num));
}

2
src/rp2_common/hardware_timer/include/hardware/timer.h
View File

@ -106,7 +106,7 @@ void busy_wait_until(absolute_time_t t);
*/
static inline bool time_reached(absolute_time_t t) {
uint64_t target = to_us_since_boot(t);
uint32_t hi_target = target >> 32u;
uint32_t hi_target = (uint32_t)(target >> 32u);
uint32_t hi = timer_hw->timerawh;
return (hi >= hi_target && (timer_hw->timerawl >= (uint32_t) target || hi != hi_target));
}

14
src/rp2_common/hardware_timer/timer.c
View File

@ -75,7 +75,7 @@ void busy_wait_us(uint64_t delay_us) {
void busy_wait_until(absolute_time_t t) {
uint64_t target = to_us_since_boot(t);
uint32_t hi_target = target >> 32u;
uint32_t hi_target = (uint32_t)(target >> 32u);
uint32_t hi = timer_hw->timerawh;
while (hi < hi_target) {
hi = timer_hw->timerawh;
@ -113,7 +113,7 @@ static void hardware_alarm_irq_handler(void) {
if (timer_hw->timerawh >= target_hi[alarm_num]) {
// we have reached the right high word as well as low word value
callback = alarm_callbacks[alarm_num];
timer_callbacks_pending &= ~(1u << alarm_num);
timer_callbacks_pending &= (uint8_t)~(1u << alarm_num);
} else {
// try again in 2^32 us
timer_hw->alarm[alarm_num] = timer_hw->alarm[alarm_num]; // re-arm the timer
@ -147,7 +147,7 @@ void hardware_alarm_set_callback(uint alarm_num, hardware_alarm_callback_t callb
alarm_callbacks[alarm_num] = callback;
} else {
alarm_callbacks[alarm_num] = NULL;
timer_callbacks_pending &= ~(1u << alarm_num);
timer_callbacks_pending &= (uint8_t)~(1u << alarm_num);
irq_remove_handler(irq_num, hardware_alarm_irq_handler);
irq_set_enabled(irq_num, false);
}
@ -167,10 +167,10 @@ bool hardware_alarm_set_target(uint alarm_num, absolute_time_t target) {
spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_TIMER);
uint32_t save = spin_lock_blocking(lock);
timer_hw->intr = 1u << alarm_num;
timer_callbacks_pending |= 1u << alarm_num;
timer_callbacks_pending |= (uint8_t)(1u << alarm_num);
timer_hw->alarm[alarm_num] = (uint32_t) t;
// Set the alarm. Writing time should arm it
target_hi[alarm_num] = t >> 32u;
target_hi[alarm_num] = (uint32_t)(t >> 32u);
// 2) check for races
if (!(timer_hw->armed & 1u << alarm_num)) {
@ -186,7 +186,7 @@ bool hardware_alarm_set_target(uint alarm_num, absolute_time_t target) {
timer_hw->armed = 1u << alarm_num;
timer_hw->intr = 1u << alarm_num; // clear the IRQ too
// and set flag in case we're already in the IRQ handler waiting on the spinlock (on the other core)
timer_callbacks_pending &= ~(1u << alarm_num);
timer_callbacks_pending &= (uint8_t)~(1u << alarm_num);
}
}
spin_unlock(lock, save);
@ -200,7 +200,7 @@ void hardware_alarm_cancel(uint alarm_num) {
spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_TIMER);
uint32_t save = spin_lock_blocking(lock);
timer_hw->armed = 1u << alarm_num;
timer_callbacks_pending &= ~(1u << alarm_num);
timer_callbacks_pending &= (uint8_t)~(1u << alarm_num);
spin_unlock(lock, save);
}

18
src/rp2_common/hardware_uart/include/hardware/uart.h
View File

@ -172,7 +172,7 @@ uint uart_set_baudrate(uart_inst_t *uart, uint baudrate);
*/
static inline void uart_set_hw_flow(uart_inst_t *uart, bool cts, bool rts) {
hw_write_masked(&uart_get_hw(uart)->cr,
(!!cts << UART_UARTCR_CTSEN_LSB) | (!!rts << UART_UARTCR_RTSEN_LSB),
(bool_to_bit(cts) << UART_UARTCR_CTSEN_LSB) | (bool_to_bit(rts) << UART_UARTCR_RTSEN_LSB),
UART_UARTCR_RTSEN_BITS | UART_UARTCR_CTSEN_BITS);
}
@ -191,10 +191,10 @@ static inline void uart_set_format(uart_inst_t *uart, uint data_bits, uint stop_
invalid_params_if(UART, stop_bits != 1 && stop_bits != 2);
invalid_params_if(UART, parity != UART_PARITY_NONE && parity != UART_PARITY_EVEN && parity != UART_PARITY_ODD);
hw_write_masked(&uart_get_hw(uart)->lcr_h,
((data_bits - 5) << UART_UARTLCR_H_WLEN_LSB) |
((stop_bits - 1) << UART_UARTLCR_H_STP2_LSB) |
((parity != UART_PARITY_NONE) << UART_UARTLCR_H_PEN_LSB) |
((parity == UART_PARITY_EVEN) << UART_UARTLCR_H_EPS_LSB),
((data_bits - 5u) << UART_UARTLCR_H_WLEN_LSB) |
((stop_bits - 1u) << UART_UARTLCR_H_STP2_LSB) |
(bool_to_bit(parity != UART_PARITY_NONE) << UART_UARTLCR_H_PEN_LSB) |
(bool_to_bit(parity == UART_PARITY_EVEN) << UART_UARTLCR_H_EPS_LSB),
UART_UARTLCR_H_WLEN_BITS |
UART_UARTLCR_H_STP2_BITS |
UART_UARTLCR_H_PEN_BITS |
@ -212,8 +212,8 @@ static inline void uart_set_format(uart_inst_t *uart, uint data_bits, uint stop_
* \param tx_needs_data If true an interrupt will be fired when the TX FIFO needs data.
*/
static inline void uart_set_irq_enables(uart_inst_t *uart, bool rx_has_data, bool tx_needs_data) {
uart_get_hw(uart)->imsc = (!!tx_needs_data << UART_UARTIMSC_TXIM_LSB) |
(!!rx_has_data << UART_UARTIMSC_RXIM_LSB);
uart_get_hw(uart)->imsc = (bool_to_bit(tx_needs_data) << UART_UARTIMSC_TXIM_LSB) |
(bool_to_bit(rx_has_data) << UART_UARTIMSC_RXIM_LSB);
if (rx_has_data) {
// Set minimum threshold
hw_write_masked(&uart_get_hw(uart)->ifls, 0 << UART_UARTIFLS_RXIFLSEL_LSB,
@ -244,7 +244,7 @@ static inline bool uart_is_enabled(uart_inst_t *uart) {
*/
static inline void uart_set_fifo_enabled(uart_inst_t *uart, bool enabled) {
hw_write_masked(&uart_get_hw(uart)->lcr_h,
(!!enabled << UART_UARTLCR_H_FEN_LSB),
(bool_to_bit(enabled) << UART_UARTLCR_H_FEN_LSB),
UART_UARTLCR_H_FEN_BITS);
}
@ -314,7 +314,7 @@ static inline void uart_read_blocking(uart_inst_t *uart, uint8_t *dst, size_t le
for (size_t i = 0; i < len; ++i) {
while (!uart_is_readable(uart))
tight_loop_contents();
*dst++ = uart_get_hw(uart)->dr;
*dst++ = (uint8_t) uart_get_hw(uart)->dr;
}
}

2
src/rp2_common/hardware_vreg/vreg.c
View File

@ -8,5 +8,5 @@
#include "hardware/vreg.h"
void vreg_set_voltage(enum vreg_voltage voltage) {
hw_write_masked(&vreg_and_chip_reset_hw->vreg, voltage << VREG_AND_CHIP_RESET_VREG_VSEL_LSB, VREG_AND_CHIP_RESET_VREG_VSEL_BITS);
hw_write_masked(&vreg_and_chip_reset_hw->vreg, ((uint)voltage) << VREG_AND_CHIP_RESET_VREG_VSEL_LSB, VREG_AND_CHIP_RESET_VREG_VSEL_BITS);
}

4
src/rp2_common/pico_bootrom/include/pico/bootrom.h
View File

@ -27,8 +27,8 @@ extern "C" {
* \param c2 the second character
* \return the 'code' to use in rom_func_lookup() or rom_data_lookup()
*/
static inline uint32_t rom_table_code(char c1, char c2) {
return (c2 << 8u) | c1;
static inline uint32_t rom_table_code(uint8_t c1, uint8_t c2) {
return (((uint)c2) << 8u) | (uint)c1;
}
/*!

8
src/rp2_common/pico_double/double_math.c
View File

@ -9,6 +9,11 @@
#include "pico/double.h"
#include "pico/platform.h"
// opened a separate issue https://github.com/raspberrypi/pico-sdk/issues/166 to deal with these warnings if at all
_Pragma("GCC diagnostic push")
_Pragma("GCC diagnostic ignored \"-Wconversion\"")
_Pragma("GCC diagnostic ignored \"-Wsign-conversion\"")
typedef uint64_t ui64;
typedef uint32_t ui32;
typedef int64_t i64;
@ -40,7 +45,7 @@ _Pragma("GCC diagnostic push")
_Pragma("GCC diagnostic ignored \"-Wstrict-aliasing\"")
static inline bool disnan(double x) {
ui64 ix=*(i64*)&x;
ui64 ix=*(ui64*)&x;
// checks the top bit of the low 32 bit of the NAN, but it I think that is ok
return ((uint32_t)(ix >> 31)) > 0xffe00000u;
}
@ -605,3 +610,4 @@ double WRAPPER_FUNC(drem)(double x,double y) { check_nan_d2(x, y); return remquo
double WRAPPER_FUNC(remainder)(double x,double y) { check_nan_d2(x, y); return remquo(x,y,0); }
_Pragma("GCC diagnostic pop") // strict-aliasing
_Pragma("GCC diagnostic pop") // conversion

50
src/rp2_common/pico_float/float_math.c
View File

@ -8,11 +8,16 @@
#include "pico/float.h"
#include "pico/platform.h"
// opened a separate issue https://github.com/raspberrypi/pico-sdk/issues/166 to deal with these warnings if at all
_Pragma("GCC diagnostic push")
_Pragma("GCC diagnostic ignored \"-Wconversion\"")
_Pragma("GCC diagnostic ignored \"-Wsign-conversion\"")
typedef uint32_t ui32;
typedef int32_t i32;
#define PINF ( HUGE_VAL)
#define MINF (-HUGE_VAL)
#define FPINF ( HUGE_VALF)
#define FMINF (-HUGE_VALF)
#define NANF ((float)NAN)
#define PZERO (+0.0)
#define MZERO (-0.0)
@ -38,7 +43,7 @@ _Pragma("GCC diagnostic push")
_Pragma("GCC diagnostic ignored \"-Wstrict-aliasing\"")
static inline bool fisnan(float x) {
ui32 ix=*(i32*)&x;
ui32 ix=*(ui32*)&x;
return ix * 2 > 0xff000000u;
}
@ -239,7 +244,7 @@ float WRAPPER_FUNC(asinf)(float x) {
check_nan_f1(x);
float u;
u=(1.0f-x)*(1.0f+x);
if(fisstrictneg(u)) return fnan_or(PINF);
if(fisstrictneg(u)) return fnan_or(FPINF);
return atan2f(x,sqrtf(u));
}
@ -247,7 +252,7 @@ float WRAPPER_FUNC(acosf)(float x) {
check_nan_f1(x);
float u;
u=(1.0f-x)*(1.0f+x);
if(fisstrictneg(u)) return fnan_or(PINF);
if(fisstrictneg(u)) return fnan_or(FPINF);
return atan2f(sqrtf(u),x);
}
@ -368,19 +373,19 @@ float WRAPPER_FUNC(powintf)(float x,int y) {
if(y&1) return x;
else return 0;
}
if((y&1)) return fcopysign(PINF,x);
return PINF;
if((y&1)) return fcopysign(FPINF,x);
return FPINF;
}
_Pragma("GCC diagnostic pop")
check_nan_f1(x);
if(fispinf(x)) {
if(y<0) return 0;
else return PINF;
else return FPINF;
}
if(fisminf(x)) {
if(y>0) {
if((y&1)) return MINF;
else return PINF;
if((y&1)) return FMINF;
else return FPINF;
}
if((y&1)) return MZERO;
else return PZERO;
@ -420,31 +425,31 @@ float WRAPPER_FUNC(powf)(float x,float y) {
if(fisoddint(y)) return x;
else return 0;
}
if(fisoddint(y)) return fcopysign(PINF,x);
return PINF;
if(fisoddint(y)) return fcopysign(FPINF,x);
return FPINF;
}
if(fispinf(x)) {
if(fisneg(y)) return 0;
else return PINF;
else return FPINF;
}
if(fisminf(x)) {
if(!fisneg(y)) {
if(fisoddint(y)) return MINF;
else return PINF;
if(fisoddint(y)) return FMINF;
else return FPINF;
}
if(fisoddint(y)) return MZERO;
else return PZERO;
}
if(fispinf(y)) {
if(fgetexp(x)<0x7f) return PZERO;
else return PINF;
else return FPINF;
}
if(fisminf(y)) {
if(fgetexp(x)<0x7f) return PINF;
if(fgetexp(x)<0x7f) return FPINF;
else return PZERO;
}
if(fisint(y)) return fpow_0(x,y);
if(fisneg(x)) return PINF;
if(fisneg(x)) return FPINF;
return fpow_1(x,y);
}
@ -506,9 +511,9 @@ float WRAPPER_FUNC(fmodf)(float x,float y) {
FUNPACKS(ix,sx,ex,mx);
FUNPACK(iy,ey,my);
if(ex==0xff) {
return fnan_or(PINF);
return fnan_or(FPINF);
}
if(ey==0) return PINF;
if(ey==0) return FPINF;
if(ex==0) {
if(!fisneg(x)) return PZERO;
return MZERO;
@ -527,8 +532,8 @@ float WRAPPER_FUNC(remquof)(float x,float y,int*quo) {
FUNPACKS(ix,sx,ex,mx);
FUNPACKS(iy,sy,ey,my);
if(quo) *quo=0;
if(ex==0xff) return PINF;
if(ey==0) return PINF;
if(ex==0xff) return FPINF;
if(ey==0) return FPINF;
if(ex==0) return PZERO;
if(ey==0xff) return x;
if(ex<ey-1) return x; // |x|<|y|/2
@ -563,3 +568,4 @@ float WRAPPER_FUNC(dremf)(float x,float y) { check_nan_f2(x,y); return remquof(x
float WRAPPER_FUNC(remainderf)(float x,float y) { check_nan_f2(x,y); return remquof(x,y,0); }
_Pragma("GCC diagnostic pop") // strict-aliasing
_Pragma("GCC diagnostic pop") // conversion

2
src/rp2_common/pico_malloc/pico_malloc.c
View File

@ -20,7 +20,7 @@ extern void __real_free(void *mem);
extern char __StackLimit; /* Set by linker. */
static inline void check_alloc(__unused void *mem, __unused uint8_t size) {
static inline void check_alloc(__unused void *mem, __unused uint size) {
#if PICO_MALLOC_PANIC
if (!mem || (((char *)mem) + size) > &__StackLimit) {
panic("Out of memory");

2
src/rp2_common/pico_multicore/include/pico/multicore.h
View File

@ -153,7 +153,7 @@ static inline void multicore_fifo_clear_irq(void) {
* 1 | Value is 1 if this core’s TX FIFO is not full (i.e. if FIFO_WR is ready for more data)
* 0 | Value is 1 if this core’s RX FIFO is not empty (i.e. if FIFO_RD is valid)
*/
static inline int32_t multicore_fifo_get_status(void) {
static inline uint32_t multicore_fifo_get_status(void) {
return sio_hw->fifo_st;
}

4
src/rp2_common/pico_multicore/multicore.c
View File

@ -204,13 +204,13 @@ static bool multicore_lockout_handshake(uint32_t magic, absolute_time_t until) {
if (next_timeout_us < 0) {
break;
}
multicore_fifo_push_timeout_us(magic, next_timeout_us);
multicore_fifo_push_timeout_us(magic, (uint64_t)next_timeout_us);
next_timeout_us = absolute_time_diff_us(get_absolute_time(), until);
if (next_timeout_us < 0) {
break;
}
uint32_t word = 0;
if (!multicore_fifo_pop_timeout_us(next_timeout_us, &word)) {
if (!multicore_fifo_pop_timeout_us((uint64_t)next_timeout_us, &word)) {
break;
}
if (word == magic) {

4
src/rp2_common/pico_platform/platform.c
View File

@ -34,6 +34,6 @@ uint8_t rp2040_chip_version() {
assert(manufacturer == MANUFACTURER_RPI);
assert(part == PART_RP2);
// Version 1 == B0/B1
int version = (chip_id & SYSINFO_CHIP_ID_REVISION_BITS) >> SYSINFO_CHIP_ID_REVISION_LSB;
return version;
uint version = (chip_id & SYSINFO_CHIP_ID_REVISION_BITS) >> SYSINFO_CHIP_ID_REVISION_LSB;
return (uint8_t)version;
}

6
src/rp2_common/pico_printf/printf.c
View File

@ -290,7 +290,7 @@ static size_t _ntoa_long(out_fct_type out, char *buffer, size_t idx, size_t maxl
if (!(flags & FLAGS_PRECISION) || value) {
do {
const char digit = (char) (value % base);
buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
buf[len++] = (char)(digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10);
value /= base;
} while (value && (len < PICO_PRINTF_NTOA_BUFFER_SIZE));
}
@ -317,7 +317,7 @@ static size_t _ntoa_long_long(out_fct_type out, char *buffer, size_t idx, size_t
if (!(flags & FLAGS_PRECISION) || value) {
do {
const char digit = (char) (value % base);
buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
buf[len++] = (char)(digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10);
value /= base;
} while (value && (len < PICO_PRINTF_NTOA_BUFFER_SIZE));
}
@ -559,7 +559,7 @@ static size_t _etoa(out_fct_type out, char *buffer, size_t idx, size_t maxlen, d
// output the exponential symbol
out((flags & FLAGS_UPPERCASE) ? 'E' : 'e', buffer, idx++, maxlen);
// output the exponent value
idx = _ntoa_long(out, buffer, idx, maxlen, (expval < 0) ? -expval : expval, expval < 0, 10, 0, minwidth - 1,
idx = _ntoa_long(out, buffer, idx, maxlen, (uint)((expval < 0) ? -expval : expval), expval < 0, 10, 0, minwidth - 1,
FLAGS_ZEROPAD | FLAGS_PLUS);
// might need to right-pad spaces
if (flags & FLAGS_LEFT) {

4
src/rp2_common/pico_runtime/runtime.c
View File

@ -52,7 +52,7 @@ void runtime_install_stack_guard(void *stack_bottom) {
// mask is 1 bit per 32 bytes of the 256 byte range... clear the bit for the segment we want
uint32_t subregion_select = 0xffu ^ (1u << ((addr >> 5u) & 7u));
mpu_hw->ctrl = 5; // enable mpu with background default map
mpu_hw->rbar = (addr & ~0xff) | 0x8 | 0;
mpu_hw->rbar = (addr & (uint)~0xff) | 0x8 | 0;
mpu_hw->rasr = 1 // enable region
| (0x7 << 1) // size 2^(7 + 1) = 256
| (subregion_select << 8)
@ -120,7 +120,7 @@ void runtime_init(void) {
#if !(PICO_NO_RAM_VECTOR_TABLE || PICO_NO_FLASH)
__builtin_memcpy(ram_vector_table, (uint32_t *) scb_hw->vtor, sizeof(ram_vector_table));
scb_hw->vtor = (intptr_t) ram_vector_table;
scb_hw->vtor = (uintptr_t) ram_vector_table;
#endif
#ifndef NDEBUG

2
src/rp2_common/pico_standard_link/binary_info.c
View File

@ -15,7 +15,7 @@
#if !PICO_NO_FLASH
#ifndef PICO_NO_BI_BINARY_SIZE
extern char __flash_binary_end;
bi_decl_with_attr(bi_binary_end((uintptr_t)&__flash_binary_end), reset_section_attr)
bi_decl_with_attr(bi_binary_end((intptr_t)&__flash_binary_end), reset_section_attr)
#endif
#endif

8
src/rp2_common/pico_stdio/stdio.c
View File

@ -94,7 +94,7 @@ static bool stdio_put_string(const char *s, int len, bool newline) {
return false;
#endif
}
if (len == -1) len = strlen(s);
if (len == -1) len = (int)strlen(s);
for (stdio_driver_t *driver = drivers; driver; driver = driver->next) {
if (!driver->out_chars) continue;
if (filter && filter != driver) continue;
@ -129,13 +129,13 @@ static int stdio_get_until(char *buf, int len, absolute_time_t until) {
}
int WRAPPER_FUNC(putchar)(int c) {
char cc = c;
char cc = (char)c;
stdio_put_string(&cc, 1, false);
return c;
}
int WRAPPER_FUNC(puts)(const char *s) {
int len = strlen(s);
int len = (int)strlen(s);
stdio_put_string(s, len, true);
stdio_flush();
return len;
@ -181,7 +181,7 @@ void stdio_flush() {
}
typedef struct stdio_stack_buffer {
uint used;
int used;
char buf[PICO_STDIO_STACK_BUFFER_SIZE];
} stdio_stack_buffer_t;

4
src/rp2_common/pico_stdio_uart/stdio_uart.c
View File

@ -69,8 +69,8 @@ void stdin_uart_init() {
void stdio_uart_init_full(struct uart_inst *uart, uint baud_rate, int tx_pin, int rx_pin) {
uart_instance = uart;
uart_init(uart_instance, baud_rate);
if (tx_pin != -1) gpio_set_function(tx_pin, GPIO_FUNC_UART);
if (rx_pin != -1) gpio_set_function(rx_pin, GPIO_FUNC_UART);
if (tx_pin >= 0) gpio_set_function((uint)tx_pin, GPIO_FUNC_UART);
if (rx_pin >= 0) gpio_set_function((uint)rx_pin, GPIO_FUNC_UART);
stdio_set_driver_enabled(&stdio_uart, true);
}

3
test/kitchen_sink/CMakeLists.txt
View File

@ -65,13 +65,12 @@ target_compile_options(kitchen_sink_options INTERFACE
-Wcast-qual
-Wfloat-equal
-Wmissing-format-attribute
-Wconversion
$<$<COMPILE_LANGUAGE:C>:-Wstrict-prototypes>
-Wno-inline
# todo not sure these are true, but investigate
#-Wpacked
# todo requires unsigned register constants
#-Wconversion
# todo we have some of these in usb_device_tiny to try to make it more readable.. perhaps doxygen would help here instead
-Wredundant-decls