add comment about using clk_gpout0 enable bit (Fixes #413)
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@ -70,6 +70,8 @@ bool clock_configure(enum clock_index clk_index, uint32_t src, uint32_t auxsrc,
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// propagating when changing aux mux. Note it would be a really bad idea
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// to do this on one of the glitchless clocks (clk_sys, clk_ref).
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else {
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// Disable clock. On clk_ref and clk_sys this does nothing,
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// all other clocks have the ENABLE bit in the same position.
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hw_clear_bits(&clock->ctrl, CLOCKS_CLK_GPOUT0_CTRL_ENABLE_BITS);
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if (configured_freq[clk_index] > 0) {
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// Delay for 3 cycles of the target clock, for ENABLE propagation.
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@ -101,6 +103,8 @@ bool clock_configure(enum clock_index clk_index, uint32_t src, uint32_t auxsrc,
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tight_loop_contents();
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}
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// Enable clock. On clk_ref and clk_sys this does nothing,
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// all other clocks have the ENABLE bit in the same position.
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hw_set_bits(&clock->ctrl, CLOCKS_CLK_GPOUT0_CTRL_ENABLE_BITS);
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// Now that the source is configured, we can trust that the user-supplied
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