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corrected clk_gpout3 to gpio pin 25 as per the rp2040 datasheet (#250)

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Tom Wasiluk 2021-03-24 15:35:02 +01:00 committed by GitHub
parent 0c941d9767
commit c1f164b9fd
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2 changed files with 2 additions and 2 deletions
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2
src/rp2_common/hardware_clocks/clocks.c
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@ -322,7 +322,7 @@ void clock_gpio_init(uint gpio, uint src, uint div) {
if (gpio == 21) gpclk = clk_gpout0; if (gpio == 21) gpclk = clk_gpout0;
else if (gpio == 23) gpclk = clk_gpout1; else if (gpio == 23) gpclk = clk_gpout1;
else if (gpio == 24) gpclk = clk_gpout2; else if (gpio == 24) gpclk = clk_gpout2;
else if (gpio == 26) gpclk = clk_gpout3; else if (gpio == 25) gpclk = clk_gpout3;
else { else {
invalid_params_if(CLOCKS, true); invalid_params_if(CLOCKS, true);
} }

2
src/rp2_common/hardware_clocks/include/hardware/clocks.h
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@ -170,7 +170,7 @@ void clocks_enable_resus(resus_callback_t resus_callback);
/*! \brief Output an optionally divided clock to the specified gpio pin. /*! \brief Output an optionally divided clock to the specified gpio pin.
* \ingroup hardware_clocks * \ingroup hardware_clocks
* *
* \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 26. These GPIOs are connected to the GPOUT0-3 clock generators. * \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 25. These GPIOs are connected to the GPOUT0-3 clock generators.
* \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator. * \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator.
* \param div The amount to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock. * \param div The amount to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock.
*/ */